Semiconductor integrated circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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C327S297000, C327S161000

Reexamination Certificate

active

07629827

ABSTRACT:
The semiconductor integrated circuit includes a first subordinate clock tree802and a second subordinate clock tree803, wherein a clock is delayed by a variable delay circuit805and inputted into the second subordinate clock tree803so that the phases are matched each other of the output clocks from the end clock drivers with the same position in respective trees, thereby reducing clock skew.

REFERENCES:
patent: 6995554 (2006-02-01), Loke et al.
patent: 7102408 (2006-09-01), Yamaguchi
patent: 7272743 (2007-09-01), Oikawa
patent: 04-076610 (1992-03-01), None
Nobuyuki Nishiguchi “a challenge to the process Friendly design in a system LSI”, Jul. 7, 2006, Semiconductor Technology Academic Research Center, p. 20 “OCV reduction by using physical properties”.

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