Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-10-23
2007-10-23
Lam, David (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185290
Reexamination Certificate
active
11195684
ABSTRACT:
A semiconductor integrated circuit has a first nonvolatile memory area and a second nonvolatile memory area to store information in accordance with a variable threshold voltage. At least one condition of the following conditions of the first nonvolatile memory area is made different from that of the second nonvolatile memory area: erase verify determination memory gate voltage, erase verify determination memory current, write verify determination memory gate voltage, write verify determination memory current, erase voltage, erase voltage application time, write voltage, and write voltage application time in the first nonvolatile memory area.
REFERENCES:
patent: 6519184 (2003-02-01), Tanaka et al.
patent: 2002/0059569 (2002-05-01), Kondo
patent: 2002/0116570 (2002-08-01), Miyamoto
patent: 2001-306543 (2001-11-01), None
patent: 2002-245023 (2002-08-01), None
Shinagawa Yutaka
Tanaka Toshihiro
Tanikawa Hiroyuki
Yamaki Takashi
Lam David
Miles & Stockbridge PC
Renesas Technology Corp.
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