Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

1990-06-26

1992-09-01

Stephan, Steven L.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

357 41, 437170, H02H 900, H01L 2702

Patent

active

051445182

ABSTRACT:
A semiconductor integrated circuit according to the present invention has a series circuit of a first field effect transistor and a load which is connected between a first potential point and a second potential point. The first field effect transistor operates in response to a control signal inputted in a gate thereof, whereby a high-level or low-level output signal is extracted from a node between the first field effect transistor and the load to output terminal. A second field effect transistor is also connected between the output terminal and the first potential point. Thus, when a surge causing the first field effect transistor to break down is applied to the output terminal, the second field effect transistor conducts to pass a surge current, whereby the first field effect transistor is prevented from being broken down.

REFERENCES:
patent: 4044373 (1977-08-01), Nomiya et al.
patent: 4112670 (1978-09-01), Morozumi
patent: 4617482 (1986-10-01), Matsuda
patent: 4789917 (1988-12-01), Miller
patent: 4858055 (1989-08-01), Okifaka
patent: 4937700 (1990-06-01), Iwahashi
Japanese Patent Laying Open Gazette, No. 58-178632.
"Reverse Bias Over-Current Protection for Power Field-Effect Transistors", IBM Technical Disclosure Bulletin, vol. 29, No. 2, Jul. 1986, pp. 567-569.
"Microcomputer M50955 having High Breakdown Port", Mitsubishi pp. 2-218-2-221.
"Application Note: Vacuum Fluorescent Display", Futaba AN-1305.

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