Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2007-09-25

2007-09-25

Chang, Joseph (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S025000, C331S074000

Reexamination Certificate

active

11106471

ABSTRACT:
During a period of preparation for actual operation, a reference clock is supplied to both a comparison clock input portion and a feedback clock input portion of a phase comparator while a feedback loop of a PLL (phase-locked loop) is interrupted, and a delay of a reset signal within the phase comparator is adjusted so as to reduce a detection dead zone of phase differences in the phase comparator.

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Japanese Office Action with English Translation issued in corresponding Japanese Patent Application No. JP 2003-151943, mailed Jun. 26, 2007.

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