Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2006-06-13

2006-06-13

Vu, Ngoc-Yen (Department: 2612)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S312000, C326S096000, C327S037000

Reexamination Certificate

active

07061530

ABSTRACT:
Even when variation in transistor characteristic, resistance or the like occurs during manufacturing, a noise component is always minimized. Each of k clock phase difference generating circuits16–18shifts a phase of a basic clock signal ADCK1by a specified different value to obtain a clock signal ADCK2and supplies the clock signal ADCK2to an A/D converter. A k counter19successively selects the clock phase difference generating circuits16–18and stores a noise component in an output of the A/D converter measured by a noise measuring circuit27in a corresponding register. A comparator25compares k noise components and obtains the number j of the clock phase difference generating circuit giving a minimum value. A selection circuit26fixedly selects only the j-th clock phase difference generating circuit. Thus, even when variation in the transistor characteristics or resistance occurs in each device in a manufacturing stage, the clock signal ADCK2obtained by shifting the phase of the basic clock signal ADCK1can be supplied to the A/D converter so that a noise component is minimized for each device.

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Official Translation of Japanese Publ. No. 06-283999.

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