Semiconductor integrated circuit

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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Details

C361S093900

Reexamination Certificate

active

07012792

ABSTRACT:
A semiconductor integrated circuit of the present invention has an output field-effect transistor formed on a main surface of a semiconductor substrate; an overcurrent detection circuit detecting an overcurrent of the output field-effect transistor; and an overcurrent limiting circuit which is connected between the gate electrode terminal and the source electrode terminal of the output field-effect transistor, controls the detected current of the overcurrent detection circuit and varies its output voltage according to variation in threshold voltage of the output field-effect transistor.

REFERENCES:
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patent: 5444591 (1995-08-01), Chokhawala et al.
patent: 5621601 (1997-04-01), Fujihira et al.
patent: 5724218 (1998-03-01), Tihanyi
patent: 6538480 (2003-03-01), Takada et al.
patent: 3821 065 (1989-01-01), None
patent: 1-282858 (1989-11-01), None

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