Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2001-11-16

2003-09-30

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S543000

Reexamination Certificate

active

06628162

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit. In particular, the present invention relates to a power source voltage generating circuit stored in a semiconductor integrated circuit and a method of testing the same.
2. Related Background Art
In a dynamic random access memory (DRAM) that is a memory element for accumulating electric charge in a capacitative element provided at an intersection of a bit line and a word line and recording information, a power source voltage tends to be lowered along with miniaturization of a circuit.
Thus, the capacity of a DRAM tends to decrease in accordance with a reduction in its size. Since the amount of electric charge accumulated in a capacitative element also decreases in a read or write operation, in order to provide sufficient margins to the read or write operation by reducing the influence of a leak, a memory circuit widely is used in which a potential of a bit line is set to be a half of a power source voltage VDD after a read or write operation is completed.
FIG. 13
is a structural view of a representative power source voltage generating circuit typically used for the purpose of generating a half of a power source voltage VDD. In
FIG. 13
, based on a reference potential VM produced by resistors R
1
and R
2
and transistors Q
1
and Q
2
, potentials applied to gates of transistors Q
3
and Q
4
are represented by (VM+VT) and (VM−VT), respectively, where VT is a threshold voltage of the transistors Q
1
and Q
2
.
In the power source voltage generating circuit, since the gate voltages of the transistors Q
3
and Q
4
are constant, currents Ids
3
and Ids
4
flowing through the transistors Q
3
and Q
4
are represented by the following Formula 1.
Ids
3
=(&bgr;/2)·(
W/L
)·(
VM−VBP
)
2
Ids
4
=−(&bgr;/2)·(
W/L
)·(
VM−VBP
)
2
  (1)
Therefore, when a voltage of an output VBP is equal to the reference voltage VM, relationships, Ids
3
=0 and Ids
4
=0 are satisfied, whereby the circuit becomes stable. Since a voltage between a gate and a source of the output stage transistor Q
3
or Q
4
varies while maintaining the relationship of the Formula 1 with respect to an increase or decrease in the voltage VBP, the voltage of the output VBP is raised or lowered by currents supplied from the power source voltage VDD or VSS, so that a potential of the output VBP is kept constant.
However, in the above-described power source voltage generating circuit, since the gate voltages applied to the output stage transistors Q
3
and Q
4
are constant, the amount of variation in the currents that can be provided due to the change in the voltage between the gate and the source is not large enough. Thus, transient response characteristics are not so good.
In order to improve the transient response characteristic, the capabilities of the output stage transistors Q
3
and Q
4
are required to increase. In order to realize this, a method of widening the areas of the output stage transistors Q
3
and Q
4
might be considered first.
However, the above-described method causes problems: (1) an increase in the area of the power source voltage generating circuit itself and (2) an increase in the amount of currents consumed by the power source voltage generating circuit along with the increase in the area thereof.
FIG. 14
is a graph showing a relationship between the output voltage VBP and a current capability IBP of an output buffer. When the areas of the output stage transistors Q
3
and Q
4
are represented as s(Q
3
) and s(Q
4
) respectively, in Q
3
′ and Q
4
′ that are varied in area from the output stage transistors Q
3
and Q
4
(varied from W to W′ in gate length and from L to L′ in gate width), the current IBP is (W′/W)·(L/L′) times so that the current capability is improved. However, since a leak current Ileak also increases at the same time, it is apparent that the current capability does not necessarily increase effectively with the increase in the area.
As described above, a bit line precharge power source voltage generating circuit typically used is required to improve the transient response characteristic, but in order to realize this without increasing a layout area thereof excessively, the output stage transistors that supply currents for bringing the voltage back to a predetermined value with respect to the change in the output VBP are required to define a circuit capable of flowing currents positively.
SUMMARY OF THE INVENTION
Therefore, with the foregoing in mind, it is an object of the present invention to provide a semiconductor integrated circuit capable of improving a transient response characteristic without increasing a layout area of a power source voltage generating circuit and a method of testing the same.
To achieve the above object, the semiconductor integrated circuit of the present invention includes a functional circuit and a power source voltage generating circuit used for operating the functional circuit. In the power source voltage generating circuit, transistors are driven in which output stages are formed by a pair of differential amplifiers receiving reference voltages having a minute voltage difference at an action point, and in a differential amplifier other than the pair of the differential amplifiers, a reference voltage other than those input to the pair of differential amplifiers is compared with an output voltage from the corresponding transistor among the transistors in their amount.
Because of the above-mentioned construction, when the output voltage varies minutely or sharply, each operating amplifier can be adopted according to either case, whereby it becomes possible to bring the voltage back to a predetermined value with respect to the change of a voltage in a short time.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit includes a first resistor, a second resistor, a third resistor, and a fourth resistor connected in series to one another, as well as a first differential amplifier, a second differential amplifier, and a third differential amplifier, and a first transistor, a second transistor, and a third transistor. The first resistor connects a terminal on the opposite side of that connected to the second resistor to a first power source potential and the fourth resistor connects a terminal on the opposite side of that connected to the third resistor to a ground potential. Gate terminals of the first transistor, the second transistor, and the third transistor are connected to output terminals of the first differential amplifier, the second differential amplifier, and the third differential amplifier respectively. Drain terminals of the first transistor, the second transistor, and the third transistor are connected to either the first power source potential or the ground potential. Source terminals of the first transistor, the second transistor, and the third transistor are connected to an output terminal. One input terminal of each of the first differential amplifier, the second differential amplifier, and the third differential amplifier is connected to the output terminal, the other input terminal of the first differential amplifier receives a first reference voltage produced between the first resistor and the second resistor, the other input terminal of the second differential amplifier receives a second reference voltage produced between the second resistor and the third resistor, and the other input terminal of the third differential amplifier receives a third reference voltage produced between the third resistor and the fourth resistor.
Since a gate voltage of a transistor supplying currents in order to generate a predetermined power source voltage can be varied, when the output voltage varies from a predetermined value, the capability of supplying currents largely can be changed. Since a reference voltage of each differential amplifier is varied

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