Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2001-07-12

2002-11-05

Shingleton, Michael B (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C330S303000, C327S552000, C327S563000

Reexamination Certificate

active

06476676

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor integrated circuit excellent in a common-mode rejection ratio for improving a common-mode rejection ratio of a circuit of an integrated amplifier, integrator, filter or the like.
BACKGROUND ART
Balanced signal processing (differential signal processing) is one of circuit technologies effective in being used for increasing a dynamic range of an analog block. The differential signal processing is not only provided with high capability of rejecting common-mode noise such as power source coupling, blocking signal inputted in a common mode but also provided with various advantages in comparison with an unbalanced type signal processing such as restraint of harmonic components at even number orders or flexibility in design.
However, in designing a differential type circuit, feedback for a differential signal does not effect influence on an output of a common-mode component and consequently, a common-mode signal stays in an open loop and an output potential is not determined. Therefore, in order to maintain a common-mode output voltage at certain reference voltage, other negative feedback loop must be included in a common-mode signal path so that the level of the common-mode output voltage is fixed to the potential.
Generally, it is difficult to design the newly added feedback loop for the common-mode signal, depending on cases, the circuit may be brought into an unstable state. In order to resolve the problem, there have been proposed several circuits which does not use the feedback loop for a common-mode signal. As a representative conventional example, there is pointed out B. Nauta, “A CMOS transconductance-C filter technique for very high frequencies”, IEEE J. Solid-State Circuits vol.27, No.2 pp. 142-153, February 1992. FIG. 2 shows an integrator for a filter proposed by Nauta. Although a detailed description will be given later of the operation principle, according to the circuit, a common-mode component cannot be rejected completely and the common-mode rejection ratio is restricted even in an ideal state in which a variation in elements is not included.
DISCLOSURE OF INVENTION
When an input signal to be amplified is very small, there is included large blocking signal having a high frequency in an input and there is constituted a filter for mobile communication for rejecting thereof, suppression of the blocking signal becomes insufficient when the common-mode signal rejection ratio is small. Further, in consideration of constituting an amplifier having a high gain, in order to avoid saturation by common-mode noise, it is necessary to improve the common-mode rejection ratio. From the above-described, it is a problem of the present invention to realize a differential circuit for significantly reducing a common-mode gain.
In order to achieve the above-described problem, according to the present invention, transconductance circuits of an input of an integrating circuit proposed by Nauta are made to be differential circuits and are connected in cross connection. Thereby, there can be added a common-mode rejection characteristic at an input stage and the common-mode rejection ratio of a total is improved.


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IEEE Journal of Solid State Circuits, vol. 27, No. 2, Feb. 1992, “A CMOS Transconductance-C Filter Technique for Very High Frequencies”, B. Nauta, pp. 142-153.
IEICE, Trans. Fundamentals, vol. E83-A, No. 2, Feb. 2000, “A BiCMOS Seventh-Order Lowpass Channel-Select Filter Operating at 2.5V Supply for a Spread-Spectrum Wireless Receiver”, M. Jeong et al, pp. 210-219.

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