Semiconductor integrated circuit

Static information storage and retrieval – Addressing – Sync/clocking

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36518905, 36523008, G11C 700

Patent

active

050560646

ABSTRACT:
A data transfer control circuit is connected between a sense amplifier and output buffer circuit. The data transfer control circuit is controlled by a pulse signal supplied from a pulse signal generator so as to have longer delay time which pulse signal is not generated by the pulse signal generator, and operate as noise canceller and prevents from outputting erroneous signal therefrom to the output buffer circuit.

REFERENCES:
patent: 4573147 (1986-02-01), Aoyama et al.
patent: 4701889 (1987-10-01), Ando
patent: 4707809 (1987-11-01), Ando
patent: 4827454 (1989-05-01), Okazaki
patent: 4959816 (1990-09-01), Iwahashi et al.

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