Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
1999-02-05
2001-08-21
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C327S333000
Reexamination Certificate
active
06278305
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit which can be operated by low voltage.
2. Description of the Related Art
Power consumption of the semiconductor integrated circuit is mainly decided by the product of electrostatic capacity, operating voltage, and the operation frequency. The amount of the power consumption becomes proportion to the square of the operating voltage (power supply voltage). Therefore, lowering the operating voltage is very effective for lowering the power consumption of the semiconductor integrated circuit. Then, various methods have been developed for the low voltage operation of the semiconductor integrated circuit.
For instance, Tokkai-Hei08-181593 unexamined Japanese patent application indicates a semiconductor integrated circuit for decreasing its power consumption by supplying a minimum voltage which does not cause a malfunction operation at the critical path, which minimum voltage is detected and determined in advance by using a dummy circuit for the critical path of the semiconductor integrated circuit and a voltage regulator.
However, when the power supply voltage of the entire integrated circuit is lowered, the following problems are caused. If the power supply voltage is lowered, the delay time of each gate of the semiconductor and the delay time depending on the wiring capacity (load capacity) will increase while consumption current decreases. Especially, because accurate estimation of the wiring capacity (load capacity) is difficult, a relative timing skew is included in the delay time depending on the wiring capacity (load capacity). For instance, regarding a synchronized semiconductor integrated circuit, the synchronized operation based on standard clock among block modules is necessary for the normal correct operation. The clock skew among block modules can be a cause for serious malfunctioning. Clock wiring patterns are installed to various direction in various form, so that it is very difficult to match and cancel the slew to 0 accurately among entire blocks at the design stage in consideration of all load capacity correctly. If the power supply voltage is lowered under above mentioned status, the difference of the amount of the delay among blocks becomes large because of the collapse of the load balance, and it causes the malfunction operation.
Moreover, slew (slew of transient response) of the transmitted waveform becomes not steep in the designed circuit which uses a low speed gate. If the output waveform become dull, the timing design becomes remarkably complex because the influence for the delay time by the slew of the waveform become large when the threshold of an internal circuit changes by the fluctuation of the process condition.
SUMMARY OF THE INVENTION
Therefore, with the foregoing in mind, it is an object of the present invention to provide a semiconductor circuit which can operate by low power supply voltage.
In order to achieve the objects, a semiconductor integrated circuit includes a processing means, a driving means which has, as an input, the output of the processing means and a slew adjustment means for detecting the slew of the transient response of the output waveform of the driving means and adjusting the slew based on the result of the slew detection.
This embodiment makes it possible to adjust the timing skew depending on the difference of the slew in the output waveform of the driving circuit. The stable operation of the synchronous integrated circuit can be achieved.
Next, the slew adjustment means of the present invention preferably includes a mode control circuit for switching a mode of the entire semiconductor integrated circuit to either a slew adjustment mode or a normal operation mode. The slew adjustment means switches the mode to the normal operation mode after adjusting the slew in the slew adjustment mode.
This embodiment makes it possible to perform slew adjustment surely because the slew adjustment means changes the mode to the normal operation mode after slew adjustment of the semiconductor integrated circuit.
Next, the slew adjustment means of the present invention preferably further includes a slew detection circuit for detecting the slew of the transient response in the output waveform of the driving means, a power supply voltage control circuit for controlling the power supply voltage supplied to the driving circuit according to the detection result of the slew detection circuit.
In this embodiment, the slew adjustment means includes the slew detection circuit and the power supply control circuit, the power supply voltage supplied to the driving means can be adjusted according to the detection result of the slew of the transient response in the output waveform of the driving means. Therefore, this embodiment makes it possible to adjust the driving voltage to the lowest voltage by which the amount of slew can be reduced within the predetermined range and achieve the low power consumption of the semiconductor integrated circuit.
Next, the slew detection circuit of the present invention preferably further includes a first comparator for comparing the voltage of the inputted signal and a first reference voltage, a second comparator for comparing the voltage of the inputted signal and a second reference voltage and a timer starting counting according to the output of the first comparator.
This embodiment makes it possible to surely measure the transient building up time of the voltage signal from the first reference voltage to the second reference voltage, and detect whether the amount of the slew is within the predetermined range or not.
Next, the driving means of the present invention preferably further includes a level shift circuit for converting the output voltage of the processing means to the voltage supplied from the power supply voltage control circuit.
This embodiment makes it possible to cut off the output of driving means completely even if the power supply voltage of the processing means is considerably lower than the power supply voltage of the driving means. Therefore, the power supply voltage of the processing means can be decreased up to a minimum voltage.
Next, the driving means of the present invention preferably further includes plural driving circuits and the plural driving circuits are grouped. Each group comprises the slew adjustment means, the slew adjustment means switches the mode to the normal operation mode after completing all slew adjustment in all slew adjustment means.
In this embodiment, the driving circuits are grouped according to the similarity of the condition such as the wiring pattern length and parasite capacitance which can be the cause for the slew, and the slew adjustment means can be installed in the driving circuit in each group. This embodiment makes it possible to achieve optimum slew adjustment by each group. Therefore, effective and fine slew adjustment can be achieved in consideration of reducing the added element.
Next, the driving means of the present invention preferably includes plural clock buffers.
By this embodiment, the present invention can be applied to the clock buffers where the timing skew could be a serious problem in general.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.
REFERENCES:
patent: 5124570 (1992-06-01), Meno
patent: 5949249 (1999-09-01), Preuss et al.
patent: 8-181593 (1996-07-01), None
Patent Abstracts of Japan, publication No. 08181593A, publication date Jul. 12, 1996.
Cox Cassandra
Matsushita Electric Industrial, Ltd.
Rosenthal & Osha L.L.P.
Tran Toan
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