Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2000-06-05

2001-03-27

Riley, Shawn (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S274000, C307S011000

Reexamination Certificate

active

06208124

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor integrated circuits and, more particularly, to a semiconductor integrated circuit which performs voltage regulation for a boosting power supply circuit or a negative boosting power supply circuit.
BACKGROUND OF THE INVENTION
In recent years, low voltage and single power supply have been required of a flash memory as a nonvolatile semiconductor memory device and, therefore, there is a demand for a semiconductor integrated circuit which performs boosting or negative boosting on chip to supply voltages required for writing, erasing, and the like.
FIG. 26
is a block diagram illustrating a conventional semiconductor integrated circuit (hereinafter referred to as a semiconductor IC).
With reference to
FIG. 26
, the semiconductor IC comprises a booster
201
and a regulator
202
. The booster
201
boosts a power supply voltage V
DD
applied to this semiconductor IC, to a predetermined voltage V
PP
. The regulator
202
is supplies with the boosted voltage V
PP
, and regulates the boosted voltage V
PP
to output an output voltage Vo. The regulator
202
comprises a reference voltage generator
203
, a differential amplifier
204
, an output circuit
205
, and a voltage divider
206
.
The reference voltage generator
203
is supplied with the boosted voltage V
PP
from the booster
201
, and generates a reference voltage Vref. The reference voltage generator
203
can change the reference voltage Vref to plural voltages. The differential amplifier
204
is supplied with the output voltage V
PP
from the booster
201
through a power input terminal and, further, it is supplied with the reference voltage Vref generated by the reference voltage generator
203
and a divided voltage Vd (described later) from the voltage divider
206
. The differential amplifier performs differential amplification on the basis of the voltage V
PP
, and outputs a voltage Va so obtained. The output circuit
205
includes a P type MOS transistor having a gate connected to the output terminal of the differential amplifier
204
, a source connected to the output terminal of the booster
201
, and a drain connected to the input terminal of the voltage divider
206
. The output circuit
205
outputs, as an output voltage Vo from the regulator
202
, a voltage obtained by regulating the output voltage V
PP
from the booster
201
on the basis of the output voltage Va from the differential amplifier
204
. The voltage divider
206
is supplied with the output voltage Vo from the output circuit
205
, and outputs a divided voltage Vd obtained by dividing the output voltage Vo.
Hereinafter, the operation of the conventional semiconductor IC so constructed will be described.
The booster
201
generates a boosted voltage V
PP
which is higher than the power supply voltage V
DD
from the power supply voltage V
DD
, and outputs this voltage V
PP
to the regulator
202
. The regulator
202
outputs a predetermined constant voltage Vo obtained by decreasing the boosted voltage V
PP
, from its output terminal.
In the regulator
202
, the reference voltage generator
203
is supplied with the boosted voltage V
PP
, generates a predetermined reference voltage Vref, and outputs it. Accordingly, the reference voltage Vref has a value in a range from the boosted voltage V
PP
to a ground voltage V
SS
. The voltage divider
206
outputs a divided voltage Vd which is obtained by dividing the output voltage Vo from the regulator
202
, according to a predetermined voltage ratio r (r≧1), so as to satisfy the relationship VO/Vd=r. The output voltage Vd from the voltage divider
206
is compared with the reference voltage Vref by the differential amplifier
204
, and the P type MOS transistor M
10
in the output circuit
205
is controlled by the output voltage Va from the differential amplifier
204
, resulting in Vd=Vref. In this way, the regulator
202
is able to generate an output voltage Vo which is maintained at a constant voltage, i.e., Vo=r·Vref, from the boosted voltage V
PP
which is not always stable.
Further, the regulator
202
is required to provide different output voltages Vo for different modes of the nonvolatile semiconductor memory device, such as writing, erasing, etc. In this case, supply of voltages suited for different modes is realized by changing the reference voltage Vref for each mode.
Further, although a power supply circuit performing positive boosting has been described above, a conventional semiconductor IC for generating a negative voltage is similar to the above-described circuit. In this case, in the semiconductor IC shown in
FIG. 26
, the booster
201
is replaced with a negative booster, and the P type MOS transistor M
10
in the output circuit
205
is replaced with an N type MOS transistor, whereby a semiconductor IC which is able to output a constant negative voltage with reference to a negative reference voltage is obtained.
In the conventional semiconductor IC, however, since the regulator
202
operates with the output voltage V
PP
from the booster
201
, a great load is applied to the booster
201
. Usually, the booster
201
is a charge pump circuit, and the output current vs. output voltage characteristics are as shown in FIG.
27
.
FIG. 27
is a graph showing the output current I
PP
vs. output voltage V
PP
characteristics of the charge pump circuit. The abscissa indicates the output current I
PP
, and the ordinate indicates the output voltage V
PP
. As seen from the graph of
FIG. 27
, the output voltage V
PP
from the booster
201
decreases with an increase in the output current I
PP
. Accordingly, when the load on the booster
201
increases, the output current I
PP
increases, resulting in difficulty in obtaining a predetermined output voltage V
PP
. Especially, in order to secure a boosted voltage V
PP
higher than a predetermined level to achieve a reduced power supply voltage, the number of stages of the charge pump circuit must be increased, but this causes further increase in the reduction radio of the output voltage V
PP
to the output current I
PP
. Therefore, the capacitance in the booster
201
must be increased to maintain the output voltage V
PP
from the booster
201
at a predetermined level, resulting in an increase in the area of the booster
201
.
Likewise, also in the conventional semiconductor IC for generating a negative voltage, since the regulator operates with the output voltage from the negative booster, a great load is applied to the negative booster. Therefore, like the booster described above, the output current from the negative booster increases, and it becomes difficult for the negative booster to secure a predetermined output voltage. Also in this case, in order to secure the output voltage, the area of the negative booster must be increased to increase the capacitance in the negative booster.
SUMMARY OF THE INVENTION
The present invention is made to solve the above-described problems and has for its object to provide a semiconductor IC, the area of which can be reduced by reducing the scale of a booster or a negative booster.
Other objects and advantages of the invention will become apparent from the detailed description that follows. The detailed description and specific embodiments described are provided only for illustration since various additions and modifications within the scope of the invention will be apparent to those of skill in the art from the detailed description.
According to a first aspect of the present invention, there is provided a semiconductor integrated circuit comprising a booster for boosting a power supply voltage, and outputting the boosted voltage; an output circuit being supplied with the boosted voltage, generating an output voltage from the boosted voltage, and outputting the output voltage through an output terminal; a reference voltage generator being supplied with the power supply voltage, generating a reference voltage from the power supply voltage, and outputting the reference voltage; a voltage divider being supplied wi

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