Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

1991-12-30

1993-08-31

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523005, 36523008, 365233, 36523006, 36518903, 365 49, G11C 700

Patent

active

052415104

ABSTRACT:
A semiconductor integrated circuit comprises a plurality of memory blocks each provided with a set of word lines shared by the other memory blocks so that the memory blocks may be accessed separately by using different address signals entered on a time division basis. The integrated circuit also comprises one or more than one decoders for choosing a word line from an end to allow access to any of the plurality of memory blocks and a word line latch circuit inserted into the set of word lines between a pair of memory blocks. With such an arrangement, the number of decoders, word lines, bit lines, memory cells and sense amplifiers as well as the overall size of the integrated circuit can be minimized. Besides, the access time to a certain memory block that constitutes a critical factor to determine the performance the entire integrated circuit can be curtailed so that it may be accessed in a very short period of time and consequently the performance of the circuit may be remarkably improved.

REFERENCES:
patent: 4525777 (1985-06-01), Webster et al.
patent: 4833649 (1989-05-01), Greub
patent: 4926385 (1990-05-01), Fujishima et al.
patent: 4933910 (1990-06-01), Olson et al.
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 5179687 (1993-01-01), Hidaka et al.
IBM Technical Disclosure Bulletin, vol. 30, No. 8, Jan. 1988.
Chuang et al., "An On-Chip 72K Pseudo Two-Port Cache Memory Subsystem," Symposium on VLSI Circuits, pp. 113-114, Jun. 1990.

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