Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

1998-10-26

2000-06-13

Callahan, Tim

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327264, 327 24, 327144, 327146, H03H 1126

Patent

active

060753978

ABSTRACT:
The present invention provides an technique for compensating a operation speed variation based on a principle that a circuit operation speed is adjusted by reflecting a delay time of an internal circuit itself that is an object of the operation speed fluctuation compensation.
An internal circuit (1 in FIG. 1) has a critical path with an output terminal pair that outputs the identical logical values till its each operation is finished, and data in a complementary signal format as soon as its each operation is finished. A logical gate (2 in FIG. 1) can detect its operation end by sensing the signal transition into a complementary signal format at the output terminal pair of the internal circuit.

REFERENCES:
patent: 4017806 (1977-04-01), Rogers
patent: 5047733 (1991-09-01), Nonaka et al.
patent: 5304954 (1994-04-01), Saito et al.
patent: 5783972 (1998-07-01), Nishikawa
patent: 5818304 (1998-10-01), Hogeboom
by V. Von Kaenel et al., "A Voltage Reduction Technique for Battery-Operated Systems", IEEE Journal Of Solid-State Circuits, vol. 25, No. 25, Oct. 1990, pp. 1136-1140.

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