Semiconductor input protection device

Details Semiconductor input protection device Semiconductor input protection device

1990-10-12

1991-06-25

DeBoer, Todd E.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Impedance insertion

361 91, 357 2313, H02H 904

Patent

active

050272527

ABSTRACT:
A semiconductor input protection device is disclosed which comprises a well type punch-through transistor consisting of a pair of parallel-opposed well layers through intermediation of a field oxide film, one of which is connected to an input terminal and the other to a reference potential. The device further comprises an impurity diffusion layer resistance with an end thereof connected to the input terminal. The lower limit distance between the opposed sides of the well layers to each other and the channel stopper is set to be smaller than that between the channel stopper and the input terminal-side well layer in the area where the latter and the impurity diffusion layer resistance intersect. The two lower limit distances depend on punch-through voltage, the width of the depletion layer in the well layer at applied punch-through voltage, and the junction disruptive strength of the well layer.

REFERENCES:
patent: 4385337 (1983-05-01), Asano et al.
patent: 4527213 (1985-07-01), Ariizumi
patent: 4578694 (1986-03-01), Ariizumi et al.
patent: 4605980 (1986-08-01), Hartranft et al.
patent: 4609931 (1986-09-01), Koike

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