Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2000-04-18
2002-07-23
Leja, Ronald W. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
Reexamination Certificate
active
06424509
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a new protective circuit, for preventing breakage from electrostatic forces, which in provided on an input terminal of a semiconductor device, and more particularly, to a protective circuit having a higher protection capability than that of conventional protective circuits.
2. Description of the Related Art
Input signals provided from external devices, noises, or electrostatic forces are often concurrently supplied to the input terminal of semiconductor device. It is a concern that an overshoot or undershoot may occur on the input signal supplied to the input terminal and that it may result in breakage or damage of the internal circuit.
To counter the above damaging causes, the conventional semiconductor device includes a protective circuit, such as a diode or transistor, on its input terminal. The protective circuit includes a protective element for countering overshoot, a protective element for countering the undershoot, a protective element for countering charges caused by an excessive buildup of electrostatic forces, and the like.
Generally, the protective element for countering or enabling countermeasures to the overshoot is provided between the input terminal and an electrical power source wiring, and is activated to divert charge to an electrical power source wiring, when overshoot occurs on the input terminal. In a normal state, when a higher potential than that of the power source wiring is not generated on the input terminal, the protective circuit is not activated. Additionally, the protective element, for countermeasures applied to the undershoot, is provided between the input terminal and the ground wiring, and the protective circuit is activated to supply charge from the ground wiring to the input terminal and to suppress the generation of undershoot. In the normal state, when a lower potential than that of the ground potential is not generated on the input terminal, the protective circuit is not activated. The above described protective elements for overshoot and undershoot are respectively connected to the power source wiring having the higher potential and the ground wiring having the lower potential so that they are not activated in the normal state and are activated, only when the overshoot or undershoot occurs.
There is another approach in which a large sized transistor element to absorb a greater amount of charges is provided, when the larger charges caused by the electrostatic forces are applied to the external terminal.
In the conventional semiconductor device, power from the external devices is supplied to the inner circuits via the power source wiring. Therefore, in the conventional semiconductor device, the capacity of the power source wiring is as large as that of the ground wiring so that the power source wiring can absorb the charges, even if the charge is diverted to the power source wiring through the protective element for countermeasures applied to overshoot.
To reduce the consumption of power, however, the power supplied from the external device is nearly employed in all of the inner circuits of the recent semiconductor device. For example, a dynamic RAM (DRAM) contains an internal power source, of which potential is dropped from the external power source, in the internal circuit, and supplies internal power to the memory cells or the sense amplifiers occupying the chip. Consequently, there is a possibility that the ratio of the internal circuit employing the internal power source becomes high.
In the above semiconductor device, the charges cannot be sufficiently diverted through the external power source wiring through the elements for countermeasures applied to the overshoot, using a conventional protective circuit, and therefore, there is a higher possibility that the internal circuits connected to the external power source wiring will be damaged.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a semiconductor device having a protective circuit for countermeasures applied to electrical noises generated on an input terminal.
It is another object of the present invention to provide a semiconductor device having a protective circuit by which the overshoot generated on the input terminal can be effectively suppressed.
To achieve the above-described objects, in the semiconductor device according to the present invention, in addition to a protective diode for countermeasures applied to overshoot provided between the input terminal and a power source wiring, a MOS transistor is provided between the power source wiring and a ground wiring. The MOS transistor activates as a gate-controlled lateral transistor and becomes conductive earlier than a large sized bipolar transistor, therefore providing better protection between the input terminal and the ground wiring.
According to the above-structure of the protective circuit of the present invention, when the overshoot occurs in the input signal supplied to the input terminal, the protective diode becomes conductive to divert the charges, and further, the MOS transistor becomes conductive instead of or before the lateral bipolar transistor becomes conductive to divert the charges to the ground wiring. Additionally, the protective bipolar transistor becomes conductive to divert a greater amount of charges generated by the electrostatic forces to the ground wiring. Therefore, it becomes possible to prevent the greater amount of charges from flowing to the internal power source wiring connected to the internal circuit and thereby more effectively suppress the overshoot.
To achieve the above-described objects, a semiconductor device is provided including a power source wiring, a ground wiring and an input terminal supplied with an input signal from an external device and connected to internal circuits, comprising: a first semiconductor area of a first conductive type at a semiconductor substrate surface, a protective bipolar transistor having a collector area of a second conductive type, which is formed in a first semiconductor area of a first conductive type at a semiconductor substrate surface and connected to the input terminal and an emitter area of the second conductive type, which is formed in the first semiconductor area and connected to the ground wiring; a protective diode having an anode area of the first conductive type, which is formed in a second semiconductor area of the second conductive type at the semiconductor substrate surface and connected to the input terminal, the second semiconductor area being connected to the power source wiring as a cathode area; and a protective MOS transistor having a drain area of the second conductive type, which is formed in a third semiconductor area of the first conductive type at the semiconductor substrate surface and connected to the cathode area, a source area of the second conductive type, which is formed in the third semiconductor area and connected to the ground wiring, and a gate electrode, which is formed on the semiconductor substrate between the drain and source areas and connected to the ground wiring.
Additionally, to achieve the above-described objects, a semiconductor device including a power source wiring, a ground wiring, and an input terminal supplied with an input signal from an external device and connected to internal circuits, comprising: a protective diode, provided between the input terminal and the power source wiring, for becoming conductive when a high voltage is applied to the input terminal; and a protective MOS transistor, provided between a cathode terminal of the protective diode and the ground wiring, having a drain area of a second conductive type, which is formed in a first conductive type semiconductor area at a semiconductor substrate surface and connected to the cathode terminal, a source area of the second conductive type, which is formed in the first conductive type semiconductor area and connected to the ground wiring, and a gate electrode connected to the ground wiring, which is formed on
Otsuki Yoshimichi
Yamada Shin-ichi
Fujitsu Limited
Leja Ronald W.
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