Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
Reexamination Certificate
1997-10-14
2003-01-21
Loke, Steven (Department: 2811)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
C438S093000, C438S094000, C257S441000, C257S442000, C257S443000
Reexamination Certificate
active
06509203
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of imaging, and in particular to semiconductor imaging devices and methods of producing such devices.
BACKGROUND OF THE INVENTION
A variety of semiconductor imaging devices are known in the art. Such devices typically comprise semiconductor material such as cadmium telluride (CdTe), cadmium zinc telluride (CdZnTe), mercury iodide (HgI
2
), indium antimonide (InSb), gallium arsenide (GaAs), geranium (Ge), titanium bromide (TiBr), lead iodide (PbI) and silicon (Si). For example, an imaging pixel semiconductor system is disclosed in published International Patent Application WO-A-95/33332 owned by the assignee hereof. The contents of that document are incorporated herein by reference.
Known silicon-based semiconductor imaging devices have been implemented with a continuous grounded metal guard ring or pattern in electrical contact with the semiconductor material and encompassing the pixel contacts. The guard ring is formed on the sensitive face of the semiconductor material in the pixel plane adjacent to the edge of the material. The guard ring can improve electric field uniformity at the edge of the material which might otherwise cause image deterioration.
In such devices, however, the guard ring occupies a significant area of the sensitive surface, creating a substantial “inactive” area around the periphery of the detector face. The region is inactive in the sense that it is extremely difficult or impossible to detect photons incident in this region, since any charge created by absorption of photons flows immediately to ground via the grounded guard ring. Typically, the pixel pitch might be as small as 35 &mgr;m, and the width of the guard ring might be at least as big, if not significantly bigger (typically the width is in the range 25-500 &mgr;m). The inactive area causes particular problems when several individual detectors are used together to form a tiled detector surface. The combined effect of the guard rings of adjacent tiles can create a blind area of 1 mm or more in width at the region of the tile edges. Such a blind area is unacceptable for high-sensitivity or high-resolution imaging.
Embodiments of the present invention are directed to solving these and other problems with known imaging devices.
SUMMARY OF THE INVENTION
According to embodiments of the present invention, edge deterioration effects in a semiconductor imaging device may be reduced or substantially eliminated by arranging an edge-most contact element or elements on the surface of the semiconductor material sufficiently close to the edge of the material. In one such embodiment, the distance between the edge of at least one charge collecting contact of a semiconductor imaging device and the edge of the semiconductor material is between 0 and about 500 &mgr;m and/or between 0 and a value not significantly greater than ⅓ of the thickness of the semiconductor material.
By arranging at least some of the edge-most contacts close to the edge of the semiconductor material, the field non-uniformities may be displaced closer to the edge of the semiconductor material and, if the spacing is sufficiently small, extend at least partly beyond (i.e., outside) the semiconductor volume. It will be appreciated that a reduction in the size of the semiconductor region affected by the non-uniformities will achieve a corresponding reduction in Image Deterioration Effect (IDE) at the edge of the detector.
The spacing between the edge of the semiconductor material and the outermost edge or edges of the (or each) pixel contact may be made sufficiently small to reduce or alleviate IDE in the detector when in use. Generally, best results are achieved if the spacing is made as small as possible.
Applying the teachings of the present invention, suitable spacing for any particular semiconductor detector can be found by routine investigation, such as by routine experimentation or by simulation of the electrostatic fields as described herein. For example, in accordance with embodiments of the present invention, the spacing may be configured not significantly greater than about ⅕, or about {fraction (1/15)}, or about {fraction (1/30)}, or about {fraction (1/50)}, of the semiconductor thickness (with increasing preference for smaller fractions). Such ratios of spacing/thickness can provide increasingly better results in alleviating edge IDE. Likewise, the edge spacing may be configured not significantly greater than about 300 &mgr;m, or 100 &mgr;m, or 50 &mgr;m or 30 &mgr;m (with increasing preference for smaller values). These values match the above fractions for a semiconductor thickness of 1.5 mm, but can also be applied irrespective of the semiconductor thickness in other cases. In still other embodiments, selected ones of the foregoing values may also be combined to give a preferred spacing of not significantly greater than about ⅓ (or ⅕, etc.) of the semiconductor thickness if greater than 1.5 mm, and not significantly greater than about 500 &mgr;m (or 300 &mgr;m, etc.) if the semiconductor thickness is generally equal to or less than 1.5 mm.
Various methods can be used to produce semiconductor imaging devices having an edge spacing as described above. According to one embodiment of such a method, the contact(s) are formed on the surface of a pre-cut (or pre-formed) semiconductor substrate of a desired size using photolithography. Modern photolithographic techniques can be used to form a contact within about 50 &mgr;m of the substrate edge. According to another embodiment, the contact(s) may be formed on the surface of an oversized substrate using any convenient technique, and the edge of the substrate then cut close to the edge-most contact(s). Modern cutting techniques can be used to form a cut to a precision of about 10 &mgr;m or better.
According to yet another embodiment, an edge-most portion of at least one charge collecting contact of a semiconductor imaging device is spaced from the surface of the semiconductor material by passivation material. For example, the edge-most contacts may have a step profile (or at least the side of the contact adjacent to the semiconductor material may have a step profile) and be arranged so that the portion which steps away from the surface of the semiconductor substrate extends towards the edge of the semiconductor substrate. This takes into account that strong field non-uniformities are believed only to exist in the semiconductor material very close to the surface on which the charge collection contacts are mounted. By spacing the edge-most portion of the contact from the semiconductor surface, and introducing a passivation layer, the most intense field is confined to the non-sensitive passivation material where no breakdown effect is possible. Such a technique may be particularly effective when used in combination with the previously-discussed technique of positioning the edge-most charge collection contact(s) close to the edge of the semiconductor material.
In yet another embodiment, a non-sensitive field shaping region may be arranged outside, but adjacent to, at least one edge of the semiconductor imaging device. Such an arrangement can avoid reducing the area on which charge collection contacts can be mounted (which is a deficiency of using a guard ring), yet still provide a field shaping or controlling effect to reduce edge IDE problems. For example, the field shaping region may comprise non-sensitive material within which is or are arranged one or more field shaping strips. The positions of the strips, and the potential(s) applied to the strips can be chosen to achieve the desired field shaping. Different potentials can be applied to different strips if desired. The field shaping region may extend around the periphery of each single detector element. Additionally, or alternatively, the field shaping region may extend around the external periphery of a detector made up of a number of separate detector units (e.g., tiles) positioned side-by-side.
According to another embodiment of the
Sarakinos Miltiadis Evangelos
Schulman Tom Gunnar
Spartiotis Konstantinos Evangelos
Kang Donghee
Kenyon & Kenyon
Loke Steven
Simage Oy
LandOfFree
Semiconductor imaging device and method for producing same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor imaging device and method for producing same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor imaging device and method for producing same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3064434