Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Reexamination Certificate
1998-03-06
2001-03-27
Lee, John R. (Department: 2878)
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
C250S2140RC
Reexamination Certificate
active
06207944
ABSTRACT:
FIELD OF INVENTION
This invention relates to an imaging device, in particular to a semiconductor imaging device. The invention finds application to large area imaging, and is particularly suitable for X-ray imaging.
BACKGROUND OF INVENTION
Imaging devices are used in medical diagnosis, biotechnology or industrial non-destructive testing and quality control. Imaging is mostly carried out by means of ionizing radiation such as X-rays, gamma rays or beta rays. Radiation is detected by an imaging surface which need not be planar. Image formation is carried out either by viewing the two dimensional array representing the radiation intensity incident on the detector or by decoding and/or combining one or more sets of images (coded aperture imaging in nuclear medicine, computerized tomography).
The traditional imaging device is cassette film. Other devices developed and utilized over the past 40 years include wire chambers, scintillating crystals or screens (e.g., sodium iodide Nal), BGO crystals, and digital imaging plates (CR plates) using stimulated luminescence. More recently, semiconductor devices have been employed, such as charge coupled devices (CCDs), either stand alone or coupled to scintillating screens, silicon (Si) microstrip detectors, and semiconductor pixel detectors.
Semiconductor pixel imaging devices, based on ASIC (application specific integrated circuit) CMOS processing are a most desirable option for imaging applications given their high image resolution, compactness, direct detection capability, high absorption efficiency and ability to offer real time imaging. However, limitations in ASIC CMOS technology limit the practical size of monolithic detectors to a maximum area of a few square centimeters. It is desirable to utilize several such monolithic detectors in order to form a large are “tiled” imaging surface. Such an approach is described in UK Pat. No. 2305096 and UK Pat. No. 2305095. Using straightforward computer reconstruction, the data from the individual monolithic detectors can be combined to form a generally continuous large area image equivalent to the image from a hypothetical single detector having the same overall imaging area.
However, it has been a major problem to eliminate the inactive areas between the active imaging areas of adjacent detector devices. Such inactive areas decrease the resolution of the overall imaging surface below the excellent resolution usually associated with each individual detector, and cause blind regions.
FIG. 1
illustrates one proposal (described in the U.S. Pat. No. 5,812,191), in which the imaging devices
2
are staggered apart on the imaging plane
1
. The imaging surface is displaced within the imaging plane, and several exposures are taken at different times with the devices
2
in different spatial positions. By combining the output information from the different exposures, a complete image can be built up, covering the whole image area with no inactive regions.
An alternative proposal for reducing inactive regions in tiling (which does not include motion) is to position the detectors in a tightly packed arrangement (see FIG.
2
), which covers the whole imaging plane
1
, leaving no free space between adjacent detector devices
2
. This arrangement addresses the problem of inactive area between adjacent detector devices, but it cannot address the problem that each detector element may have an inactive surface area or region within the boundary of the device.
For example,
FIG. 3
illustrates a known construction of an imaging device tile or module, described in the Applicants' PCT application No. WO-A-95/333332. The device consists of a semiconductor substrate
3
exposable to incident radiation, and arranged in front of an integrated circuit
4
. The integrated circuit is itself supported on a mount
5
, for example, a printed circuit board (PCB). By means of a uniform electric drift field, the charge generated in the substrate
3
by the incident radiation drifts towards detector cells, or pixels, defined by metal contacts on the surface of the substrate adjacent to the integrated circuit
4
. The contacts are connected by microbumps (for example, indium or solder bumps) to read out circuits in the integrated circuit and aligned with the positions of the substrate contacts. The read out circuits, the product of ASIC CMOS technology, accumulate the generated charged from successive radiation hits.
In
FIG. 3
, an edge projection
8
or the integrated circuit board, and a further edge projection
9
of the mount are required to provide room for wire connections
10
between the mount
5
and the integrated circuit
4
. It will be appreciated that when several modules are arranged side by side, the projecting regions
8
and
9
create an inactive area within the boundaries of the detector.
The present invention has arisen from an appreciation of the problems and inter-relationship between the techniques discussed below.
One approach developed by the present applicant for dealing with the inactive area problem is to incline the substrate
3
and the integrated circuit
4
relative to the mount
5
, and to arrange the mounts
5
closely such that the uplifted end
11
of each detector overlaps the edge regions
8
and
9
of an adjacent detector. Such a technique is illustrated in FIG.
4
and is described in the UK Pat. No. 2,315,157. The inclination (typically about 3 degrees) is achieved by a supporting wedge
13
carried on the mount
5
. This can achieve generally planar overall imaging surface with little or no image loss in the regions of overlap.
However, the above arrangement may not be sufficient if the detector has inactive regions along two perpendicular edges. For example
FIG. 5
illustrates schematically (from above) a detector having an integrated circuit with a projecting edge region
8
to which the wire connections
10
are made, a read-out cell or pixel circuit area
14
comprising an array of read out circuits for connection to the pixel contacts of the substrate, and a second edge area
15
containing control and multiplexing circuitry. With such an arrangement, the detector has two inactive edge regions
8
and
15
in orthogonal directions. The arrangement in
FIG. 4
does not address image continuity in two perpendicular dimensions.
Reference is also made to EP-A-0421869 which illustrates a published known design said to be capable of providing two dimensional image continuity. Referring to
FIG. 6
the detector tiles are stacked in two dimensions. A significant disadvantage is that this technique necessarily increases the thickness of the overall detector; this effect becomes more pronounced as more tiles are included. It may be difficult to obtain a symmetrical detector arrangement or a planar effective image surface. Furthermore, the design relies on the existence of tiles with a sensitive or active area extending to at least two tile edges.
SUMMARY OF THE INVENTION
The present invention has been devised bearing the above problems in mind. In contrast to the prior art in which each pixel charge collection contact of the detector substrate is in register with an associated read-out cell circuit for the contract, in one aspect of the present invention, at least one charge collection contact of the semiconductor substrate is offset away from its associated cell circuit and/or from the input of the respective cell circuit.
With the invention it has been appreciated that by deviating from a conventional design in which each pixel contact overlies its associated cell circuit, it is possible to extend the active area of the substrate (i.e., the charge collection area from which image signals can be collected by the charge collection contacts) even over regions of the integrated circuit which are needed for control and/or decoding and/or multiplexing and/or post read out circuitry.
This is particularly advantageous as it enables the inactive area of the prior art to be avoided. The resolution of images produced by tiled or mosaiced imaging surfaces can thereby be enhanced without req
Cao Tielang
Pyyhtia Jouni Ilari
Spartiotis Konstantinos Evangelos
Kenyon & Kenyon
Lee John R.
Simage O.Y.
LandOfFree
Semiconductor imaging device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor imaging device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor imaging device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2534549