Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2006-09-27
2009-06-09
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C257SE21499
Reexamination Certificate
active
07544537
ABSTRACT:
A semiconductor IC-embedded substrate suitable for embedding a semiconductor IC in which the electrode pitch is extremely narrow. The substrate comprises a semiconductor IC120in which stud bumps121are provided to the principal surface120a,a first resin layer111for covering the principal surface120aof the semiconductor IC120,and a second resin layer112for covering the back surface120bof the semiconductor IC120.The stud bumps121of the semiconductor IC120protrude from the surface of the first resin layer111.The method for causing the stud bumps121to protrude from the surface of the first resin layer111may involve using a wet blasting method to cause an overall reduction of the thickness of the first resin layer111.The stud bumps121can thereby be properly uncovered even when the electrode pitch of the semiconductor IC120is narrow.
REFERENCES:
patent: 4926239 (1990-05-01), Fujita et al.
patent: 4941255 (1990-07-01), Bull et al.
patent: 5745984 (1998-05-01), Cole, Jr. et al.
patent: 5994166 (1999-11-01), Akram et al.
patent: 6104093 (2000-08-01), Caletka et al.
patent: 6136668 (2000-10-01), Tamaki et al.
patent: 6175157 (2001-01-01), Morifuji
patent: 6338980 (2002-01-01), Satoh
patent: 6489685 (2002-12-01), Asahi et al.
patent: 6525414 (2003-02-01), Shiraishi et al.
patent: 6555924 (2003-04-01), Chai et al.
patent: 6582991 (2003-06-01), Maeda et al.
patent: 6753483 (2004-06-01), Andoh et al.
patent: 6784530 (2004-08-01), Sugaya et al.
patent: 6969554 (2005-11-01), Kashiwagi et al.
patent: 2001/0018242 (2001-08-01), Kramer et al.
patent: 2001/0036711 (2001-11-01), Urishima
patent: 2002/0106893 (2002-08-01), Furukawa et al.
patent: 2003/0001283 (2003-01-01), Kumamoto
patent: 2003/0013233 (2003-01-01), Shibata
patent: 2004/0178482 (2004-09-01), Bolken et al.
patent: 2005/0142696 (2005-06-01), Tsai
patent: 2006/0021791 (2006-02-01), Sunohara et al.
patent: 2007/0045793 (2007-03-01), Tanaka
patent: 1225629 (2002-07-01), None
patent: 1503409 (2005-02-01), None
patent: WO 03/065778 (2003-08-01), None
patent: 2529987 (1989-07-01), None
patent: 09-321408 (1997-12-01), None
patent: 9-321408 (1997-12-01), None
patent: 11-274241 (1999-10-01), None
patent: 2001-250902 (2001-09-01), None
patent: 2001-339165 (2001-12-01), None
patent: 2002-050874 (2002-02-01), None
patent: 2002-170840 (2002-06-01), None
patent: 2002-246500 (2002-08-01), None
patent: 2002-246507 (2002-08-01), None
patent: 2002-290051 (2002-12-01), None
patent: 2003-007896 (2003-01-01), None
patent: 2003-37205 (2003-02-01), None
patent: 2003-197655 (2003-07-01), None
patent: 2005-064470 (2005-03-01), None
patent: EP 0 370 745 (1990-05-01), None
European Search Report and Opinion dated Nov. 6, 2007 and attachments (9 pages).
Dibble E. P., et al: “Considerations for Flip Chip,” Advance Packaging, IHS Publishing Group, US, vol. 6, No. 3, May 1997, pp. 28-30, XP000694608, ISSN: 1065-0555.
U.S. Appl. No. 10/900,458, filed Jul. 28, 2004, Minoru Takaya et al.
Japanese Office Action received Feb. 13, 2007 and its excerpt translation in English.
European Search Report from the European Patent Office, dated Aug. 9, 2006.
Kawabata Ken-ichi
Morita Takaaki
Sarkar Asok K
TDK Corporation
Wolff Kevin A.
Wolff Law Offices PLLC
LandOfFree
Semiconductor IC-embedded substrate and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor IC-embedded substrate and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor IC-embedded substrate and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4146232