Semiconductor having reduced configuration pins and method...

Details Semiconductor having reduced configuration pins and method... Semiconductor having reduced configuration pins and method...

2005-11-29

2005-11-29

Tsai, Carol S. W. (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S105000, C365S149000, C365S194000, C365S189050

Reexamination Certificate

active

06970794

ABSTRACT:
A configurable semiconductor device having a plurality of predetermined configurations comprises a measurement circuit to measure an electrical characteristic of at least one external impedance and to determine a digital value corresponding to the measured electrical characteristic. A storage circuit includes memory locations having contents accessible as a function of the digital value. Each of the contents corresponds to a respective one of the predetermined configurations. A controller configures a device characteristic of the configurable semiconductor device based on the contents of the memory locations corresponding to the digital value.

REFERENCES:
patent: 4419619 (1983-12-01), Jindrick et al.
patent: 4659997 (1987-04-01), Ferland et al.
patent: 4764925 (1988-08-01), Grimes et al.
patent: 5194979 (1993-03-01), Koai et al.
patent: 5325315 (1994-06-01), Engel et al.
patent: 5818247 (1998-10-01), Pyun
patent: 6101618 (2000-08-01), McClure
patent: 6400160 (2002-06-01), Sampath
patent: 6643472 (2003-11-01), Sakamoto et al.
patent: 2002/0171448 (2002-11-01), Takeuchi
patent: 2003/0210917 (2003-11-01), Stewart et al.

Affiliated with

Also associated with

Rating

Semiconductor having reduced configuration pins and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor having reduced configuration pins and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor having reduced configuration pins and method... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3513427