Metal working – Barrier layer or semiconductor device making
Reexamination Certificate
1999-03-30
2001-11-27
Tsai, Jey (Department: 2812)
Metal working
Barrier layer or semiconductor device making
C438S014000
Reexamination Certificate
active
06322597
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a semiconductor fabrication line and, more particularly, to a semiconductor fabrication line with a contamination preventing function.
BACKGROUND OF THE INVENTION
Conventional semiconductor fabrication lines are classified into an equipment concentration layout type (job shop) that same equipment is in common use for a same process thereby reducing the number of equipments, and an equipment distribution layout type (flow shop) that equipments are disposed in the order of fabrication process of semiconductor and separately provided even for a same process.
FIG. 1
shows an example of the equipment concentration layout type of fabrication line. As shown, this equipment concentration layout type has the processes of lithography, film forming
1
, film forming
2
, ion implantation, CVD, diffusion, cleaning and dry etch. Equipment for a material that may cause contamination is indicated hatched, equipment for another material that may cause contamination is indicated blacked, and part that common equipment is available is indicated ‘common’. Namely, the lithography process and the ion implantation process are in common use. In this equipment concentration layout type, a bay for a same kind of process where equipment is disposed is formed and a wafer is transported between bays using a common carrier, i.e., a cassette and a carrying mechanism. Therefore, it is apt to incur a cross-contamination.
FIG. 2
shows an example of the equipment distribution layout type of fabrication line. Equipment for a material that may cause contamination is indicated hatched. This equipment distribution layout type has the processes of base
1
, base
2
, gate, gate wiring, diffusion region, interlayer film, contact, interlayer film, capacitor, interlayer film, wiring, interlayer film, wiring and upper part. In this equipment distribution layout type, a bay is formed for each process unit and equipments are disposed nearly in the order of process. Therefore, though it does not incur such cross-contamination that the equipment concentration layout type does, the number of equipments increases so much.
In any fabrication lines described above, it is important to prevent contamination in the process of fabricating a semiconductor. Conventional preventions against contamination are as follows.
When film-forming/processing equipment for contamination causing material is disposed in the semiconductor fabrication line as shown in
FIGS. 1 and 2
, the situation of contamination occurrence is monitored inside and outside the film-forming/processing equipment for contamination causing material. If a contamination occurs, a prevention against contamination, e.g., alteration of equipment and carrying mechanism and addition of contamination removal process, is taken (first prior art).
Also, when film-forming/processing equipment for contamination causing material is disposed in the semiconductor fabrication line, a contamination (Al, Cu etc.) from the wiring process in the later processes of semiconductor fabrication has been, thus far, mainly considered. However, there is a probability that a contamination caused by a contamination causing material occurs even in the earlier processes such that various silicides are used for gate wiring. In such a case, in order to maintain a low level of contamination, a method of separating the line into several stages in the process of fabrication is taken (second prior art).
FIG. 3
shows an example that the semiconductor fabrication process is separated into two lines, a line before the wiring process (front-end line) and a line after the wiring process (back-end line). Thus, depending on the semiconductor fabrication process, different lines may be provided for before and after the wiring process, so as to avoid the wiring material to contaminate the pre-wiring process.
In the semiconductor fabrication lines describes above, a wafer is transported between bays or equipments. This is conducted carrying the wafer on a carrier (cassette).
FIG. 4
shows an example of conventional method of using a carrier in semiconductor fabrication equipment. In this method of using a carrier, after wafers
55
coming loaded on a cassette
54
are unloaded from the wafer unloading side of equipment
50
, then the cassette
54
is moved to the wafer loading side and is set there. After completing the process, the wafers
55
are loaded on the selfsame cassette
54
, then forwarded to the next process. Also, while the wafers
55
are processed through the processing, the cassette
54
may be cleaned and then set to the loading side.
In the conventional method of preventing contamination in the first prior art, the equipment for film-forming/processing the contamination causing material exists in the line. Therefore, it is impossible to reduce to zero the probability that the contaminator adheres to any part (front and rear surfaces of wafer, carrier, carrying mechanism etc.) thereby causing a line-contamination, namely, the risk of contamination occurrence is always underlying. Also, since it is necessary to monitor always the contamination inside and outside specific equipment, there is a problem that the contamination control is complicated.
In the conventional method of preventing contamination in the second prior art, to maintain a low level of contamination, it is necessary to separate the line into much more stages in the process of fabrication process. Namely, in the case of two-stage separation in
FIG. 3
, in the latter-half line, various contaminators are likely to mix therefore causing an increase in contamination level of the lines. Furthermore, when separating the line into stages more than two, there is a problem that equipment such as lithography needs to be provided for each line thereby increasing the equipment cost of line.
Also, in the conventional method of using a carrier, when a contamination causing material adheres to the cassette, the contamination from the cassette to the wafer occurs. Even when the cassette is cleaned during the process, unless the different cassettes are used separately for a process that a contamination causing material appears and a process that no contamination causing material appears, it is impossible to eliminate the possibility of the contaminator to transfer through the cassette. Also, even for the cassette cleaning, it is difficult to clean the cassette in all processes.
Thus, in the above prior arts, the separation/isolation of the process for film-forming/processing the contamination causing material is not conducted sufficiently.
SUMMARY OF THE INVENTION
Accordingly, it is in an object of the invention to provide a semiconductor fabrication line that a contamination causing material can be eliminated perfectly.
It is a further object of the invention to provide a wafer transfer mechanism that can transfer a wafer preventing a contamination causing material.
According to the invention, a semiconductor fabrication line for fabricating a semiconductor device, comprises:
a mainstream line for conducting a semiconductor fabrication process to fabricate the semiconductor device; and
an isolation line disposed separated from the mainstream line in the semiconductor fabrication line;
wherein the isolation line is provided for, of the semiconductor fabrication process, a contamination-including semiconductor fabrication process that a contamination causing material which may cause a contamination of the mainstream line appears on the surface of a wafer, and after processing the contamination causing material to be eliminated from the surface of the wafer in the isolation line, the wafer is returned from the isolation line to the mainstream line.
According to another aspect of the invention, a wafer transfer mechanism for carrying a wafer in a semiconductor fabrication process, comprises:
a before-processing cassette that is used before processing the wafer; and
an after-processing cassette that is used after processing the wafer.
REFERENCES:
patent: 4433951 (1984-02-01), Koch
patent: 4461690 (1
McGinn & Gibb PLLC
NEC Corporation
Stevenson André
Tsai Jey
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