Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-09-04
1999-04-06
Chaudhuri, OIik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438524, 438528, H01L 2176
Patent
active
058917870
ABSTRACT:
A method for isolating a first active region from a second active region, both of which are configured within a semiconductor substrate. The method comprises forming a dielectric masking layer above a semiconductor substrate. An opening is then formed through the masking layer. A pair of dielectric spacers are formed upon the sidewalls of the masking layer within the opening. A trench is then etched in the semiconductor substrate between the dielectric spacers. A first dielectric layer is then thermally grown on the walls and base of the trench. A CVD oxide is deposited into the trench and processed such that the upper surface of the CVD oxide is commensurate with the substrate surface. Portions of the spacers are also removed such that the thickness of the spacers is between about 0 to 200 .ANG.. Silicon atoms and/or barrier atoms, such as nitrogen atoms, are then implanted into regions of the active areas in close proximity to the trench isolation structure.
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Fulford H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Chaudhuri Oiik
Daffer Kevin L.
Mai Anh D.
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