Semiconductor fabricating method forming channel stopper with di

Details Semiconductor fabricating method forming channel stopper with di Semiconductor fabricating method forming channel stopper with di

1993-11-03

1995-07-11

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 52, 437 45, H01L 21265

Patent

active

054321077

ABSTRACT:
A silicon dioxide film and a silicon nitride film are sequentially deposited on an n-type silicon substrate in this order. After the silicon nitride film is selectively removed to form openings, an impurity (boron) for forming a channel stopper is diagonally implanted through the resultant openings. In this case, the direction of the ion implantation, which is projected in a plane perpendicular to the direction of the channel length of a FET in a memory cell region, is 45.degree. tilted with respect to the direction of the normal of the surface substrate, so that implanted boron reaches the end portion of the channel region. Thereafter, LOCOS films are formed and, simultaneously, an impurity (boron) for threshold adjustment is implanted into the respective FET formation regions of the memory cell region and of a peripheral circuit region. This increases the threshold value for the FETs in the memory cell region due to a channel-narrowing effect, thereby minimizing the leakage current in the off state and realizing device miniaturization.

REFERENCES:
patent: 3873371 (1975-03-01), Wolf
patent: 4598460 (1986-07-01), Owens
patent: 5147811 (1992-09-01), Sakagami
patent: 5240874 (1993-08-01), Roberts

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