Semiconductor ESD protection circuit

Details Semiconductor ESD protection circuit Semiconductor ESD protection circuit

1997-02-05

1999-08-17

Medley, Sally C.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 257355, H02H 904

Patent

active

059402580

ABSTRACT:
Protection circuitry (10) for protecting an integrated circuit from an ESD pulse is provided. The protection circuitry (10) includes discharge circuitry (14) on a substrate (11) that discharges an ESD pulse to the integrated circuit to ground (18). The protection circuitry (10) also includes a substrate bias generator (25) that uses a portion of the ESD pulse's energy to bias the substrate (11) of the discharge circuitry (14).

REFERENCES:
patent: 4855620 (1989-08-01), Duvvury et al.
patent: 5290724 (1994-03-01), Leach
patent: 5528188 (1996-06-01), Au et al.

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