Semiconductor dynamic memory device

Details Semiconductor dynamic memory device Semiconductor dynamic memory device

1988-11-03

1989-12-19

Larkins, William D.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 237, 357 51, 365149, H01L 2710, G11C 1140

Patent

active

048886319

ABSTRACT:
A semiconductor IC element is three-dimensionally structured with a first active layer formed on a single crystalline silicon substrate and a second active layer formed by melting polycrystalline silicon by irradiation on an insulative layer which electrically insulates it from the first layer. Each active layer is comprised of single crystalline areas where transistors may be formed and separation areas which insulate them. PMOS, NMOS or CMOS field effective transistors are formed on these active element areas. A test circuit for testing the originally intended functions of the element as well as its redundant circuits may be formed on these layers. Throughholes are provided to connect the vertically separated active layers.

REFERENCES:
patent: 4485459 (1984-11-01), Vehkateswaran
patent: 4489478 (1984-12-01), Sakurai
Sturm et al., IEEE Electron Device Letters, vol. EDL5, No. 5, May 1984, pp. 151-153.
Akiyama et al., IEEE International Electron Device Meeting, Dec. 3, 1983, Technical Digest, pp. 352-355.

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