Semiconductor dram device having a trench

Details Semiconductor dram device having a trench Semiconductor dram device having a trench

1989-01-17

1991-01-22

Mintel, William

357 236, 357 237, 357 51, H01L 2712, H01L 2968, H01L 2701, H01L 2702

Patent

active

049874705

ABSTRACT:
A semiconductor device includes a semiconductor substrate having a trench and a transistor region around the trench, the transitor region including source and drain regions and a channel region above which a gate electrode is formed. An insulation film is formed so as to surround sidewalls of the trench. A conductive shield layer is formed along sidewalls of the first insulation film and is located under at least the gate electrode. A memory cell capacitor having first and second electrodes and an insulation film is interposed between the first and second electrodes formed in the trench. The first electrode is electrically connected to the drain region.

REFERENCES:
patent: 3811076 (1974-05-01), Smith, Jr.
patent: 3841926 (1974-10-01), Garnache
"An Isolation-Merged Vertical Capacitor Cell for Large Capacity DRAM", Shigeru Nakajima et al., IEDM Tech. Dig., 1984, pp. 240-243.
"Electrical Characteristics of Isolation-Merged Vertical Capacitor (IVEC) Cell", T. Morie et al., 1985, Symposium on VLSI Technology, May 1985, pp. 88-89.

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