Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2007-10-09
2007-10-09
Ho, Tu-Tu (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257SE21523
Reexamination Certificate
active
11235320
ABSTRACT:
A semiconductor die and a related method of processing a semiconductor wafer are disclosed in which a first interlayer insulator having a recess region of varying configuration and defining a scribe line is associated with at least one protective layer formed with a characterizing inclined side surface.
REFERENCES:
patent: 6538301 (2003-03-01), Yamada et al.
patent: 6566735 (2003-05-01), Minn et al.
patent: 00122737 (1983-07-01), None
patent: 00264489 (1996-10-01), None
Kim Sun-joon
Seo Hyeoung-won
Ho Tu-Tu
Volentine & Whitt PLLC
LandOfFree
Semiconductor die with protective layer and related method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor die with protective layer and related method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor die with protective layer and related method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3892353