Semiconductor die sealing

Details Semiconductor die sealing Semiconductor die sealing

1991-06-12

1992-08-04

Hille, Rolf

357 54, 357 67, H01L 2348, H01L 2946, H01L 2934

Patent

active

051363640

ABSTRACT:
Integrated circuit bonding pads are sealed by a surface passivation coating. The bonding pads are first edge-sealed by means of a first applied passivation coating that overlaps the edges of the bonding pad while leaving the central area uncoated. Then, a sequence of metal layers applied to overlap the open central area of the bonding pad. The layer sequence includes an optional first adherence layer such as aluminum, a barrier metal layer such as titanium-tungsten alloy, and an outer noble metal layer such as gold. Then, a second passivation layer is applied so as to overlap and seal the edges of the sequence of metal layers so as to leave only the central portion of the noble metal layer exposed. Electrical contact to the IC is then made to the exposed noble metal in the conventional manner. With respect to the passivating coatings, either or both can be silicon dioxide overcoated with silicon nitride. Furthermore, the second passivating coating can include either low melting glass that is spun-on using a powdered-glass slurry or it can be an organic, such as a polyimide monomer, spun-on in liquid form.

REFERENCES:
patent: 4827326 (1989-05-01), Altman et al.
patent: 4927505 (1990-05-01), Sharma et al.

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