Semiconductor die de-processing using a die holder and...

Abrading – Abrading process – Glass or stone abrading

Reexamination Certificate

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Details

C216S021000, C438S004000, C438S012000, C438S977000, C451S041000, C451S287000

Reexamination Certificate

active

06248001

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of semiconductor devices, and more particularly to a method and apparatus for removing one or more layers from a semiconductor die or wafer section.
BACKGROUND OF THE INVENTION
In the field of semiconductor manufacture there is often a need to de-process a semiconductor die by removing layers, which can be from several thousand angstroms (Å) thick to less than 100 Å thick, one at a time from the surface of the die. For example, de-processing a die aids in determining device failure mechanisms and is also useful in determining patent infringement of a competitor's part.
Current methods of die de-processing include removal of layers using a portable hand polisher such as those available from Buehler of Lake Bluff, Ill. and Allied of Rancho Dominguez, Calif. To use these polishers for die de-processing, the back (noncircuit side) of a semiconductor die is adhered to a generally planar support such as a “puck” with an adhesive such as pine tar. An abrasive pad, for example a material comprising a diamond lapping film, is mounted to a planar platen of the polisher. The polisher is activated and the abrasive pad is contacted with the circuit side of the die to remove layers therefrom.
Various problems result from this method of die de-processing. For example the leading edge of the die which first contacts the abrasive pad is removed at a faster rate than the remainder of the die. This results in more difficult data analysis than if the surface of the die is removed more uniformly.
Another de-processing method includes the removal of layers with an acid, but this method suffers from lack of control in chemical migration from one metal layer to another. Further, acid etches are not planar as various materials are etched at varying rates.
A method and structure for de-processing a semiconductor die which reduces or eliminates the problems described above would be desirable.
SUMMARY OF THE INVENTION
The present invention provides a new apparatus and method which reduces problems associated with the de-processing and analysis of semiconductor devices, particularly problems resulting from uneven removal of layers from the circuit side of a device. In accordance with one embodiment of the invention a semiconductor wafer having a die-shaped opening therein, and optionally having one or more layers to be polished or removed, is provided. The circuit side of the die and a generally planar first side of the wafer are aligned, for example by placing the die and the wafer on a flat surface. The die is secured to the wafer with an adhesive and any excess adhesive on the back of the die-wafer assembly is removed, either before or after the adhesive cures. Subsequently, portions of the circuit side of the die-wafer assembly are removed using mechanical planarization techniques, such as chemical mechanical polishing techniques.
Objects and advantages will become apparent to those skilled in the art from the following detailed description read in conjunction with the appended claims and the drawings attached hereto.


REFERENCES:
patent: 5626715 (1997-05-01), Rostoker
patent: 5834840 (1998-11-01), Robbins
patent: 5922620 (1999-07-01), Shimomura
patent: 6031292 (2000-02-01), Murakami
patent: 6074287 (2000-06-01), Miyaji
patent: 6074938 (2000-06-01), Asamura
patent: 6087733 (2000-07-01), Maxim
patent: 6090239 (2000-07-01), Liu
patent: 6096649 (2000-08-01), Jang
patent: 6103626 (2000-08-01), Kim
patent: 6114206 (2000-09-01), Yu
patent: 6159759 (2000-12-01), Shao
patent: 6165692 (2000-12-01), Kanai
patent: 6171982 (2001-01-01), Sato

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