Semiconductor devices with rotated substrates and methods of...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With specified crystal plane or axis

Reexamination Certificate

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C257S369000, C257S255000, C438S199000

Reexamination Certificate

active

11076080

ABSTRACT:
Integrated circuits are oriented on a substrate at an angle that is rotated between 0 to 45 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mobility of transistors may be optimized by adjusting the angle of rotation of the substrate. For a rotated substrate CMOS device design, other stress control measures may be used, such as a stress control or tensile liner, over an NMOS transistor, PMOS transistor, or both, to further adjust the stress and improve performance.

REFERENCES:
patent: 5729045 (1998-03-01), Buynoski
patent: 2004/0217448 (2004-11-01), Kumagai et al.
Kanda, Y., “A Graphical Representation of the Piezoresistance Coefficents in Silicon,” IEEE Transactions on Electron Devices, Jan. 1982, pp. 64-70, vol. ED-29, No. 1, IEEE.
Komoda, T., et al., “Mobility Improvement for 45nm Node by Combination of Optimized Stress Control and Channel Orientation Design,” IEDM Technical Digest, 2004, pp. 217-220, IEEE.
Sayama, H., et al., “Effect of <100> Channel Direction for High Performance SCE Immune pMOSFET with Less Than 0.15 μm Gate Length,” IEDM 99 Technical Digest, Mar. 1999, pp. 657-660, IEEE.

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