Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
1999-05-07
2001-07-24
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S676000, C257S672000, C257S670000, C257S692000, C257S696000, C257S735000, C257S784000, C438S123000, C438S124000, C438S127000, C174S050510, C174S050510
Reexamination Certificate
active
06265761
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor packages and a method of packaging a semiconductor device. More particularly, the present invention relates to a lead frame for a semiconductor package and a method of packaging a semiconductor device using the lead frame.
2. Background Information
In the fabrication of conventional semiconductor devices, a lead frame is used to support the semiconductor die and to provide electrical connection to the die. The leads have an inner portion nearest the die that will be enclosed by a package body, and an outer portion that remains outside the body to allow connections to be made to the circuits on the die. The die is supported on a paddle portion of the lead frame, with wires being connected from bonding pads on the die to the inner portion of the leads. The package body, which may be formed by molding processes, encloses the semiconductor die, the connecting wires, and the inner portion of the leads.
Lead frames are made from flat sheet stock, with integral side rails along the sides of the lead frames. For each lead frame, a plurality of leads are located between the side rails, with additional tie bars supporting the outer portion of the leads between the side rails. The paddle, which will support the semiconductor die, is located at the center of the lead frame and integrally connected to the outer portions of the lead frame structure, typically near the center line of the paddle.
The semiconductor die may be attached to the paddle of the lead frame using a double sided adhesive tape or an epoxy adhesive. After the wire bonding between the bonding pads formed on the semiconductor die and the inner leads of the lead frame is complete, the package body is molded around all of the other elements, except for the outer leads, to thereby form the semiconductor package. Finally, the side rails and tie bars are cut away and the outer leads are formed to the desired shape.
In many prior art packages, the semiconductor die is positioned on the paddle with clearance between the semiconductor die and the inner ends of the leads. As a result, the width of the semiconductor die is limited to somewhat less than the distance between the opposing inner ends of the leads. The maximum distance between the opposing inner ends of the leads is limited by the width of the semiconductor package, reduced by the distance that the inner ends of the leads must extend into the package body for mechanical support and wire bonding purposes.
Increasing complexity of integrated circuits has resulted in larger sizes of semiconductor dice. At the same time, users of packaged circuits are demanding smaller packages to permit reduction in the size of products, or increases in product capabilities without an increase in product size. For example, Maxim Integrated Products of Sunnyvale, Calif. provides eight lead and ten lead semiconductor packages with a nominal package body size of 3 mm square. As the die size increases and/or the package size decreases, the length of the inner portion of the leads must be reduced. Leads with a short inner lead portion are prone to mechanical failure when the outer leads are formed during device fabrication or during later assembly operations.
Lead frame designs have been proposed that eliminate the paddle and support the die on the inner portions of the leads. Since the inner ends of the leads are unconnected, they provide a cantilevered support that is inherently less rigid than a structure employing a paddle. The lack of rigidity can present difficulties in the packaging process, such as in the joining of the die to the frame and in the bonding of wires to the die.
Accordingly, there is a need to provide a lead frame that allows a larger semiconductor die to be packaged relative to the size of the package body while maintaining good mechanical support for the leads in the finished assembly. Further, the lead frame should provide good mechanical support for the die during the packaging process.
SUMMARY OF THE INVENTION
A lead frame to support a semiconductor die within an encapsulating package is disclosed. The lead frame includes a first rail and a second rail in a first plane, with the second rail parallel to and spaced apart from the first rail by more than the length of the package. A first bar and a second bar are connected perpendicularly to the first and second rails, with the second bar spaced apart from the first bar by more than the width of the package. A lead is connected perpendicularly to the first bar with an unconnected lead end extending toward the second bar and located to extend under the supported semiconductor die. A first support tab is connected perpendicularly to the first rail with a first unconnected tab end extending toward the second rail and located to extend under the supported semiconductor die. A second support tab is connected perpendicularly to the second rail with a second unconnected tab end extending toward the first rail and located to extend under the supported semiconductor die.
REFERENCES:
patent: 4857989 (1989-08-01), Mori et al.
patent: 4943843 (1990-07-01), Okinaga et al.
patent: 5153706 (1992-10-01), Baba et al.
patent: 5198883 (1993-03-01), Takahashi et al.
patent: 5252854 (1993-10-01), Arita et al.
patent: 5264730 (1993-11-01), Matsuzaki et al.
patent: 5293065 (1994-03-01), Chan
patent: 5302849 (1994-04-01), Cavasin
patent: 5428248 (1995-06-01), Cha
patent: 5436500 (1995-07-01), Park et al.
patent: 5471088 (1995-11-01), Song
patent: 5521428 (1996-05-01), Hollingsworth et al.
patent: 5541446 (1996-07-01), Kierse et al.
patent: 5554886 (1996-09-01), Song
patent: 5770888 (1998-06-01), Song et al.
patent: 5821605 (1998-10-01), Hong et al.
patent: 5834837 (1998-11-01), Song
patent: 5886405 (1999-03-01), Kim et al.
patent: 5900582 (1999-05-01), Tomita et al.
patent: 5929514 (1999-07-01), Yalamanchili
patent: 5949138 (1999-09-01), Palasi et al.
patent: 5963433 (1999-10-01), Kim
patent: 5969416 (1999-10-01), Kim
patent: 6043430 (2000-03-01), Chun
patent: 6118174 (2000-09-01), Kim
patent: 196 53 782 (1998-07-01), None
patent: 197 04 343 (1998-08-01), None
patent: 0 623 953 (1994-11-01), None
Blakely , Sokoloff, Taylor & Zafman LLP
Maxim Integrated Products Inc.
Williams Alexander O.
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