Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1998-02-20
2000-02-01
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438110, 438113, H01L 2144
Patent
active
060202173
ABSTRACT:
The invention relates to a semiconductor device which includes a packaged electrical component such as an IC chip, wherein terminal posts are realized within the chip area without additional wafer surface being required beyond the chip edge. A direct feedthrough of the individual electrical connections by way of downwardly extending terminal posts that are connected to bonding pads at the top of the chip results in a small lead length and thus lesser parasitic influences, which in turn results in optimum conditions for use at super-high frequencies. Furthermore, a process for making the semiconductor device offers the option of forming deep vertical trenches on the chip edge and to thus implement separation etching for dicing. During this process, the coverage of the side surface with encapsulating material effects a passivation on the chip edge without further outlay. Expensive rewiring of the connections on the bottom side of the chip is not necessarily due to the terminal posts.
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Kuisl Max
R.o slashed.sler Manfred
Strohm Karl
Daimler-Benz Aktiengesellschaft
Lindsay Jr. Walter L.
Niebling John F.
Spencer George H.
Wood Allen
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