Semiconductor devices including resistance elements and fuse...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S379000, C257S383000, C257S516000, C257S529000, C257S537000, C257S763000, C257S764000, C257S915000

Reexamination Certificate

active

06667537

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor devices such as an integrated circuit having active and passive elements.
RELATED ART
In a semiconductor device such as an integrated circuit, polysilicon has conventionally been used as a resistance element. More recently, resistance elements comprising a titanium-tungsten alloy, a nickel-chromium alloy, or as disclosed in Japanese Unexamined Patent Publication No. H03-276,755, a high-melting-point metal such as titanium nitride (TiN), have now been employed.
When switching over a redundant circuit for obtaining a prescribed program, adjusting voltage to be imposed on a circuit element, or adjusting frequency of a clock circuit, a fuse element for fusing a circuit by current is used. An aluminum alloy or polysilicon has so far been used for such a fuse element.
SUMMARY
It is an object of embodiments of the present invention to downsize the resistance element.
Another object of embodiments of the present invention is to permit easy fusing of the fuse element in a short period of time.
A further object of embodiments of the present invention is to permit simplification and cost reduction of the manufacturing process.
These and other objects may be accomplished in certain embodiments by providing a semiconductor device including integrated active and passive elements and including a resistance element, where the resistance element is formed from layer of titanium nitride containing oxygen or a layer of MoSi
x
.
Embodiments may also include a semiconductor device including integrated active and passive elements and including a fuse element, where the fuse element is formed from a layer of titanium nitride containing oxygen atoms or a layer of MoSi
x
.
Embodiments may also include methods for manufacturing semiconductor devices. One embodiment includes a method of manufacturing a semiconductor device having integrated active and passive elements, including forming an insulating layer over the surface of a semiconductor substrate and forming a layer of a material selected from the group consisting of titanium nitride containing oxygen, and MoSi
x
, over the surface of the insulating layer. At least one of a resistance element and a fuse element is formed by processing the layer of a material selected from the group consisting of titanium nitride containing oxygen and MoSi
x
.
Another embodiment includes a method in which an insulating layer is formed on a semiconductor substrate and two or more conductors selected from the group consisting of gate electrodes and undercoat wirings are formed on an upper part of the insulating layer. A first insulating film is formed over the semiconductor substrate and a first through-hole is formed in said first insulating film over the upper part of the conductors. A film of material selected from the group including titanium nitride containing oxygen, and MoSi
x
is formed on an upper part of the first insulating film and at least one of a resistance element or a fuse element extending between a pair of the conductors is formed by processing said film of material. A second insulating film is formed over the semiconductor substrate and a a second through-hole passing through the first insulating film and the second insulating film over an upper part of the conductors is formed. A conducting film is formed over an upper part of the second insulating film and in the second through-hole; and an electrode for the resistance element or the fuse element connected to said conductors is formed by processing the conducting film.
Still another embodiment includes a method in which two or more diffusion layers are formed in a semiconductor substrate and an insulating layer is formed over the substrate. A first through-hole is formed in the insulating layer over an upper part of the diffusion layer and a layer of material selected from the group consisting of titanium nitride containing oxygen, and MoSi
x
is formed over an upper part of the insulating layer and in the first through-hole. At least one of a resistance element or a fuse element is formed so as to extend over a pair of the diffusion layers and an insulating film is formed over the semiconductor substrate. A second through-hole is formed passing through the insulating film and the insulating layer over an upper part of the diffusion layer and a conducting film formed over an upper part of the insulating film and in the second through-hole. An electrode is formed for the at least one of a resistance element or a fuse element connected to the diffusion layer.
Yet another embodiment relates to a method for manufacturing a semiconductor device including active and passive elements, including forming an insulating layer over a semiconductor substrate and forming two electrodes comprising a metallic layer at a distance from the insulating layer. A layer of material selected from the group consisting of titanium nitride containing oxygen, and MoSi
x
, is formed on the insulating layer and at least one of a resistance element and a fuse element is formed by processing the layer of material.
Yet another embodiment relates to a method including forming a layer of material selected from the group consisting of titanium nitride containing oxygen, and MoSi
x
, over a substrate and forming at least one of a resistance element or a fuse element by processing said layer of material.
Additional embodiments relate to methods for forming semiconductor devices including steps relating to the formation of a titanium nitride film containing oxygen atoms and steps relating to the formation of an MoSi
x
film.


REFERENCES:
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English Abstract for JP3276755, which was previously submitted without an English Abstract in an IDS dated Jun. 9, 1999.
U.S. application Ser. No. 09/178,875, filed Oct. 26, 1998.

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