Semiconductor devices including an alloy layer and a wetting...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S761000, C257S764000, C257S765000, C257S784000

Reexamination Certificate

active

07091609

ABSTRACT:
Certain embodiments of the present invention relate to a semiconductor device that has a pad section having an excellent coherency with an interlayer dielectric layer, and a method for manufacturing the same. A semiconductor device1000has a pad layer30A formed over an interlayer dielectric layer20. The pad section30A includes a wetting layer32and a metal wiring layer37. The metal wiring layer37includes an alloy layer34that contacts the wetting layer32. The alloy layer34is formed from a material composing the wetting layer32and a material composing the metal wiring layer37.

REFERENCES:
patent: 5539256 (1996-07-01), Mikagi
patent: 6100182 (2000-08-01), Lee et al.
patent: 6265300 (2001-07-01), Bhansali et al.
patent: 6300237 (2001-10-01), Suzuki et al.
patent: 6307267 (2001-10-01), Wada et al.
patent: 6614119 (2003-09-01), Asahina et al.
patent: 59172745 (1984-09-01), None
Kishimoto et al., “Semiconductor Device and Electrode Formation Thereof,” English Translation of JP 59-172745 A, Sep. 1984.

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