Semiconductor devices, capacitor antifuses, dynamic random...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S298000

Reexamination Certificate

active

06903437

ABSTRACT:
In one aspect, a semiconductor device includes an array of memory cells. Individual memory cell of the array include a capacitor having first and second electrode, a dielectric layer disposed between the first and second electrodes. Select individual capacitors are energized so as to blow the dielectric layer to establish a connection between the first and second electrodes such that, after blowing the dielectric layer, the second electrode is coupled to a cell plate generator establish a bias connection therebetween. Cell plate bias connection methods are also described.

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patent: 6115283 (2000-09-01), Hidaka
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patent: 6291871 (2001-09-01), Dennison
patent: 6335892 (2002-01-01), Shirley
patent: 6590237 (2003-07-01), Yoo
patent: 6780683 (2004-08-01), Johnson et al.

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