Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-06-05
2007-06-05
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257S698000
Reexamination Certificate
active
10440590
ABSTRACT:
A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.
REFERENCES:
patent: 4956694 (1990-09-01), Eide
patent: 5111278 (1992-05-01), Eichelberger
patent: 5138115 (1992-08-01), Lam
patent: 5266833 (1993-11-01), Capps
patent: 5313098 (1994-05-01), Eide
patent: 5356838 (1994-10-01), Kim
patent: 5434745 (1995-07-01), Shokrgozar et al.
patent: 5440452 (1995-08-01), Kitahara
patent: 5502667 (1996-03-01), Bertin et al.
patent: 5541450 (1996-07-01), Jones et al.
patent: 5639695 (1997-06-01), Jones et al.
patent: 5723901 (1998-03-01), Katsumata
patent: 5752182 (1998-05-01), Nakatsuka et al.
patent: 5834162 (1998-11-01), Malba
patent: 5925924 (1999-07-01), Cronin et al.
patent: 5950070 (1999-09-01), Razon et al.
patent: 5986209 (1999-11-01), Tandy
patent: 6004867 (1999-12-01), Kim et al.
patent: 6034438 (2000-03-01), Petersen
patent: 6072236 (2000-06-01), Akram et al.
patent: 6177296 (2001-01-01), Vindasius et al.
patent: 6228684 (2001-05-01), Maruyama
patent: 6252300 (2001-06-01), Hsuan et al.
patent: 6306680 (2001-10-01), Fillion et al.
patent: 6316287 (2001-11-01), Zandman et al.
patent: 6323546 (2001-11-01), Hsuan et al.
patent: 6326689 (2001-12-01), Thomas
patent: 6335225 (2002-01-01), Doan
patent: 6344401 (2002-02-01), Lam
patent: 6352923 (2002-03-01), Hsuan et al.
patent: 6358833 (2002-03-01), Akram et al.
patent: 6376769 (2002-04-01), Chung
patent: 6379982 (2002-04-01), Ahn et al.
patent: 6379999 (2002-04-01), Tanabe
patent: 6391685 (2002-05-01), Hikita et al.
patent: 6461956 (2002-10-01), Hsuan et al.
patent: 6504244 (2003-01-01), Ichinose et al.
patent: 6521485 (2003-02-01), Su et al.
patent: 6521995 (2003-02-01), Akram et al.
patent: 6528870 (2003-03-01), Fukatsu et al.
patent: 6534386 (2003-03-01), Irie
patent: 6552426 (2003-04-01), Ishio et al.
patent: 6562647 (2003-05-01), Zandman et al.
patent: 6576992 (2003-06-01), Cady et al.
patent: 6582992 (2003-06-01), Poo et al.
patent: 6590257 (2003-07-01), Ohuchi
patent: 6603191 (2003-08-01), Wakabayashi et al.
patent: 6607941 (2003-08-01), Prabhu et al.
patent: 6611052 (2003-08-01), Poo et al.
patent: 6624505 (2003-09-01), Badehi
patent: 6656827 (2003-12-01), Tsao et al.
patent: 6693358 (2004-02-01), Yamada et al.
patent: 6710454 (2004-03-01), Boon
patent: 6727116 (2004-04-01), Poo et al.
patent: 6781244 (2004-08-01), Prabhu
patent: 6787892 (2004-09-01), Furuya et al.
patent: 6797544 (2004-09-01), Sakai et al.
patent: 6841418 (2005-01-01), Jeung et al.
patent: 6849802 (2005-02-01), Song et al.
patent: 6855572 (2005-02-01), Jeung et al.
patent: 6856023 (2005-02-01), Muta et al.
patent: 6876061 (2005-04-01), Zandman et al.
patent: 6891273 (2005-05-01), Pu et al.
patent: 6972480 (2005-12-01), Zilber et al.
patent: 7000312 (2006-02-01), Fukunabe et al.
patent: 7074696 (2006-07-01), Frankowsky et al.
patent: 2001/0009300 (2001-07-01), Sugimura
patent: 2001/0042901 (2001-11-01), Maruyarna
patent: 2002/0017398 (2002-02-01), Hacke et al.
patent: 2002/0079567 (2002-06-01), Lo et al.
patent: 2002/0096760 (2002-07-01), Simelgor et al.
patent: 2003/0102160 (2003-06-01), Gaudiello et al.
patent: 2003/0162326 (2003-08-01), Tsubosaki et al.
patent: 2004/0156177 (2004-08-01), Higashitani
patent: 59-27549 (1984-02-01), None
patent: 59-43558 (1984-03-01), None
patent: 63-232342 (1988-09-01), None
patent: 5-75014 (1993-03-01), None
patent: 6-97225 (1994-04-01), None
patent: 2001-44361 (2001-02-01), None
patent: 2001-210521 (2001-08-01), None
patent: 2003-8066 (2003-01-01), None
NN81055595: Edge Mounted MLC Packaging Scheme. May 1981; IBM Technical Disclosure Bulletin, May 1981 US: vol. 23, Issue #12, pp. #5595-5598; Publication Date: May 1, 1981.
Australian Search Report, Apr. 15, 2005, 5 pages.
U.S. Appl. No. 10/717,421, filed Nov. 19, 2003, entitled “Castellated Chip-Scale Packages and Methods for Fabricating the Same. ”
Australian Patent Office Written Opinion dated May 12, 2006.
Jeung Boon Suan
Kwang Chua Swee
Loo Neo Yong
Poo Chia Yong
Waf Low Siu
TraskBritt PC
Vu David
LandOfFree
Semiconductor devices and semiconductor device components... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor devices and semiconductor device components..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor devices and semiconductor device components... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3866670