Semiconductor devices and a process for producing the same

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 71, 357 41, 357 51, 365182, H01L 2904

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047928417

ABSTRACT:
Disclosed is an MOSIC including a plurality of silicon gate type MOSFET's in which, after the polycrystalline silicon wirings are formed simultaneously with polycrystalline silicon gates, electrodes contacted with the source and drain regions are made of polycrystalline silicon so as to be connected to the polycrystalline silicon wirings, thereby to prevent the shallow pn junctions of the source and drain regions from being destroyed by the contacts and to provide a high degree of integration to one silicon chip.

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patent: 4291322 (1981-09-01), Clemens
patent: 4326213 (1982-04-01), Shirai
patent: 4395723 (1983-07-01), Harari
patent: 4558343 (1985-12-01), Aritzumi et al.
patent: 4586238 (1986-05-01), Yatsuda
Osone, "64-KBIT NMOS Static RAM," Denshi Zaiyro, pp. 43-49, Jun. 1980.
Japanese Kohai 52-18114, May 1977 (5/77).
IEEE Journal of Solid State Circuits, vol. SC-18, #5, Oct. 1983 by Sood et al., pp. 498-508.
IEEE Journal of Solid State Circuits, vol. SC-15, #5, Oct. 1980 by Ohzone et al., pp. 854-861.
IEEE Journal of Solid State Circuits, vol. SC-15, #2, Apr. 1980, pp. 201-205 by Ohzone.

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