1975-07-14
1977-08-16
Larkins, William D.
357 50, 357 55, 357 56, 357 60, H01L 2712, H01L 2904
Patent
active
040429490
ABSTRACT:
Various devices are described herein utilizing anisotropic etching and dielectric isolations as means for limiting areas of either conductivity type semiconductor material. Surface junctions normally found in the diffused semiconductor devices of the prior art are also eliminated by the use of overlap diffusion techniques. Anisotropic etching is employed in certain of the devices for attaining buried PN junctions.
REFERENCES:
patent: RE28653 (1975-12-01), Murphy
patent: 3411051 (1968-11-01), Kilby
patent: 3492174 (1970-01-01), Nakamura et al.
patent: 3500139 (1970-03-01), Frouin et al.
patent: 3509433 (1970-04-01), Schroeder
patent: 3523223 (1970-08-01), Luxem et al.
patent: 3550260 (1970-12-01), Saltich et al.
Larkins William D.
Motorola Inc.
Olsen Henry T.
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