Semiconductor devices

Details Semiconductor devices Semiconductor devices

1988-12-05

1990-04-10

Hille, Rolf

357 56, 357 59, H01L 2174, H01L 2912

Patent

active

049165178

ABSTRACT:
A fully self-aligned polycrystalline silicon emitter bipolar transistor. Self-alignment of the p.sup.+ base contact (12) is achieved by using oxidised sidewalls (8) (sidewall spacers) of the emitter mesa (7) as part of the p.sup.+ base contact implantation mask. Collector contact (13) alignment can be achieved using oxidised sidewalls (17) of polycrystalline silicon alignment mesas (14) defined in the same polysilicon as the emitter mesa (7) but deposited on oxide (2) rather than the implanted base region (5).

REFERENCES:
patent: 4188707 (1980-02-01), Asano
patent: 4400865 (1983-08-01), Goth et al.
patent: 4521952 (1985-06-01), Riseman
patent: 4529996 (1985-07-01), Pande
patent: 4691219 (1987-09-01), Goth
"A True Polysilicon Emitter Transistor", M. B. Rowlandson et al, IEEE Electron Device Letters, vol. 6, 1985, Jun., No. 6, pp. 288-290.
IEEE International Solid-State Circuits Conference, vol. 24, Feb. 1981, pp. 216-217, IEEE, New York, U.S., T. Sakai et al, "A 3nS 1Kb RAM Using Super Self-Aligned Process Technology".
Patent Abstracts of Japan, vol. 5, No. 159 (E-77) (831), 14th Oct. 1981, JP-A-56 90 561 (Fujitsu H. K.).

Affiliated with

Also associated with

Rating

Semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2302599