Semiconductor device with wiring embedded in trenches and vias

Details Semiconductor device with wiring embedded in trenches and vias Semiconductor device with wiring embedded in trenches and vias

2005-02-15

2005-02-15

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S775000

Reexamination Certificate

active

06856024

ABSTRACT:
A method of manufacturing a semiconductor device including the steps of: (a) forming an interlayer insulating film over a semiconductor substrate; (b) forming a first mask on the interlayer insulating film, the first mask having a plurality of stripe patterns parallel to a first direction, and etching the interlayer insulating film from a surface thereof to a first intermediate depth to form a groove; and (c) forming a second mask on the interlayer insulating film, the second mask having a plurality of stripe patterns parallel to a second direction crossing the first direction, and etching the interlayer insulating film by a remaining thickness thereof in an area corresponding to the groove and not covered with the second mask to form an opening, and in an area other than the area corresponding to the groove to form a second groove reaching a second intermediate depth from a surface of the interlayer insulating film. With this method, an opening having different cross sectional shapes at different depths can be formed with a smaller number of masks.

REFERENCES:
patent: 4795722 (1989-01-01), Welch et al.
patent: 5055426 (1991-10-01), Manning
patent: 5484672 (1996-01-01), Bajuk et al.
patent: 5895239 (1999-04-01), Jeng et al.
patent: 6020255 (2000-02-01), Tsai et al.
patent: 6083824 (2000-07-01), Tsai et al.
patent: 6242339 (2001-06-01), Aoi
patent: 6274923 (2001-08-01), Mikagi
patent: 6303272 (2001-10-01), Furukawa et al.

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