Semiconductor device with varying thickness gold electrode

Details Semiconductor device with varying thickness gold electrode Semiconductor device with varying thickness gold electrode

2001-07-27

2003-06-24

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S094000

Reexamination Certificate

active

06583510

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of forming an electrode of the semiconductor device, and more particularly, to an electrode structure indispensable for an optical device or an electronic device. More particularly, the present invention relates to an electrode structure effective for effecting flow of an electric current to an electrode having a particularly small area, as well as to a method of manufacturing the electrode structure.
2. Background Art
In relation to general optical devices or electronic devices, when power is supplied to a device from the outside thereof, an electrode used for power supply is required. For instance, in the case of an optical device, an electrode is formed on a semiconductor doped with n-type or p-type impurities at a doping level of 1×10
19
/cm
3
or more, that is, a contact layer. In the case of an n-type electrode, a thin gold film of, e.g., AuGeNi, TiAu, or CrAu, is formed on the contact layer through vacuum deposition. In the case of a p-type electrode, a thin gold film of, e.g., AuZn, is formed on the contact layer through vacuum deposition. The thus-formed thin gold film is plated with gold. The reasons for the electrode assuming such a stacked structure are that ohmic contact must be established between the electrode and the semiconductor and that the strength of the electrode must be increased.
FIG. 5
is a schematic representation showing a related-art optical device.
The optical device is provided with, as an electrode structure for enabling flow of a current to the optical device, a thin gold film
13
(having a thickness of 40 to 300 nm) and gold plating (having a thickness of 2,000 through 3,000 nm).
Different material is used for the gold thin film
13
, depending on the conductivity type of a semiconductor adjoining the gold thin film
13
. For instance, if a p-type semiconductor adjoins the thin gold film
13
, AuZn (having a thickness of 40 to 300 nm) is employed. If an n-type semiconductor adjoins the thin gold film
13
, AuGeNi, TiAu, or CrAu (each having a thickness of 50 to 200 nm) is used.
As shown in
FIG. 5
, gold plating
114
is formed on the thin gold film
13
, except at the edge of a device. The gold plating
114
is not formed up to the edge of the device. The reason for this is that, if the thick gold plating
114
were formed up to the edge of the device, difficulty would be encountered in cleaving the device. In this case, the thin gold film
13
is larger in area than the gold plating
114
, and hence a surface of the thin gold film
13
appears.
An insulating film
12
(having a thickness of about 200 nm) is formed below an electrode material such that an electric current flows to only an area of a contact layer
11
(having a thickness of 600 nm) of a semiconductor. Any type of material can be used for the insulating film
12
, so long as the material has high resistivity. SiO
2
or SiN is usually employed as the insulating film
12
. In some cases, a semiconductor material having high resistivity is used.
The current that has flowed into the contact layer
11
flows to an active layer
4
, passes through a substrate having conductivity opposite that of the semiconductor, and finally reaches an underside electrode
1
(having a thickness of 1,000 nm).
An electrode is important for a semiconductor device. However, when an electric current flows to the device by way of the electrode, the electric current concentrates at the boundary surface between the thin gold film
13
and the gold plating
114
, because of a difference in specific resistance between the thin gold film
13
and the gold plating
114
. More specifically, the thin gold film
13
differs in conductivity from the gold plating
114
, and hence there arises an area in the boundary surface where current concentrates excessively. As shown in
FIG. 6
, there may sometimes arise a case where a thin gold film
100
located on a boundary surface of the semiconductor (i.e., the contact layer
11
) is melted by the Joule heat resulting from excessive concentration of an electric current.
The problems of the related-art have been described by taking an optical device as an example. Similar problems are expected to arise in an electronic device having an electrode structure in which gold plating is formed on the thin gold film or in an electronic device in which a thin gold film is greater in area than gold plating.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the problems and is aimed at preventing melting of an electrode, which would otherwise be induced by excessive concentration of an electric current.
A semiconductor device with an electrode for power supply is disclosed.
According to one aspect of the resent invention, the electrode of the semiconductor device has a gold-containing thin film and a gold-containing plating formed on the thin film, and the entire thin film is covered with the plating.
According to another aspect of the present invention, the electrode of the semiconductor device is formed by means of forming a gold-containing plating on the entire surface of a gold-containing thin film.
Other and further objects, features and advantages of the invention will appear more fully from the following description.


REFERENCES:
patent: 4974232 (1990-11-01), Morinaga et al.
patent: 4974233 (1990-11-01), Suzuki et al.
patent: 5422307 (1995-06-01), Ishii
patent: 02-37783 (1990-02-01), None
patent: 5-114763 (1993-05-01), None
patent: 08-78701 (1996-03-01), None
patent: 2001-53025 (2001-02-01), None
Sakaino et al.; “Uncooled and Directly Modulated 1.3&mgr;m DFB Laser Diode for Serial 10Gb/s Ethernet”,ECOC 2000 Abstract, vol. 1, pp. 125-126.
“7.2.2. Reduce parasitic impedance of devices”, Semiconductor Laser [Fundamentals and Applications], Baifukan (Publisher), pp. 157-159, ISBN 4-563-034371.

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