Semiconductor device with tantalum nitride barrier film

Details Semiconductor device with tantalum nitride barrier film Semiconductor device with tantalum nitride barrier film

2000-03-22

2002-08-27

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S741000, C257S750000, C257S774000

Reexamination Certificate

active

06441489

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for production thereof. More particularly, the present invention relates to a semiconductor device having a copper interconnect and a method for production thereof.
2. Description of the Related Art
In recent years, as the circuit of semiconductor apparatus has become finer and more highly integrated, the interconnect thereof has become increasingly finer and more multi-layered. As the material for the interconnect, aluminum or an alloy thereof has been used widely. With these materials, heat generation and larger power consumption have become striking in association with the increased fineness and integration of interconnect; as a countermeasure therefor, it was proposed to use, as the material for interconnect, copper which has a lower resistance than aluminum, and copper is already in practical use partially.
In forming an aluminum interconnect, an aluminum layer is formed, it is subjected to dry etching to form an aluminum interconnect pattern, and an inter-layer insulating film is formed thereon to bury the aluminum interconnect in the insulating film. In forming a copper interconnect, however, patterning by dry etching is difficult; therefore, an inter-layer insulating film is formed first, a trench is formed therein, copper is filled in the trench to form a copper interconnect (this method is called damascene method).
When copper has been filled in the trench formed in an inter-layer insulating film, to form a copper interconnect, it occurs that copper diffuses and the devices (e.g. transistor) formed on a substrate are adversely affected. To prevent this phenomenon, a thin barrier film capable of preventing the diffusion of copper is ordinarily formed in the trench before the formation of a copper interconnect.
Various films have been investigated as the thin barrier film. A tantalum-based barrier film is promising from the standpoints of the barrier property and the adhesivity with copper.
It is disclosed in JP-A-9-17790 that the problem of copper diffusion during annealing of 500° C. can be solved by, in forming a copper interconnect filled in an inter-layer insulating film, forming, as a barrier film between Si
0
2
(which is an inter-layer insulating film) and copper (which is a interconnect), a TaN (hexagonal system phase) layer or a TaN (hexagonal system phase)-Ta (&agr; phase) multilayer.
The conventional steps for forming a copper interconnect is described below with reference to FIG.
4
.
First, as shown in FIG.
4
(
a
), a SiO
2
insulating film
52
is formed on a silicon substrate
51
wherein a transistor region (not shown) and a contact (not shown) have been formed; successively, an etching stopper film
53
composed of SiN, SiON or the like is formed in a thickness of about 50 nm; then, an inter-layer insulating film
54
composed of SiO
2
(in which a trench for filling copper therein is to be made) is formed in a thickness of about 400 nm. Thereon is coated a photoresist, followed by light exposure and development to leave a photoresist mask
55
[FIG.
4
(
b
)]. Using this mask, the inter-layer insulating film
54
is subjected to etching to form a trench
56
such as shown in FIG.
4
(
c
).
Next, the substrate in which a trench pattern has been formed as above, is placed in a sputtering apparatus. First, a Ta-based barrier film
57
composed of, Ta, TaN or the like is formed in a thickness of about 30 nm and then a Cu sputtering film
58
is formed in a thickness of about 100 nm by sputtering [FIG.
4
(
d
)].
Successively, a Cu plating film
59
is formed in a thickness of 800 nm by electrolytic plating or the like [FIG.
4
(
e
)]. The Cu plating film
59
formed by electrolytic plating has a resistivity of 2.4 &mgr;&OHgr;.cm (20° C.) slightly higher than that [1.72 &mgr;&OHgr;.cm (20°C.)] of bulk copper and, moreover, owing to the small particle diameters, has lower resistance to electron migration (EM). It is known that application of an annealing treatment at about 250 to 400° C. can reduce the resistivity to about 1.9 &mgr;&OHgr;.cm (20° C.) and further brings about growth of particles and resultant increase in EM resistance.
Thereafter, chemical mechanical polishing (CMP) is conducted until the surface of the inter-layer insulating film
54
is exposed, whereby copper can be filled in the trench as shown in FIG.
4
(
f
).
SiO
2
is ordinarily used as the material for inter-layer insulating film. An inter-layer insulating film of low dielectric constant is required in logic type semiconductor devices because the shortening of delay in signal transmission is essential in such devices. Therefore, it is under investigation to form an inter-layer insulating film of low dielectric constant, composed of SiOF (∈≈3.3), by using a high-density plasma CVD apparatus (HDP-CVD) and feeding a fluorine-containing gas thereinto.
It is described in JP-A-10-275859 that when a TiN anti-reflection film formed on an Al interconnect or the like is covered with a SiOF film to fill the interconnect therein, peeling appears between the TiN film and the SiOF film. It is further described that the problem can be solved by forming a thin silicon oxide film by sputtering or by plasma CVD and then forming a SiOF film thereon.
The present inventor found out that, in forming a SiOF inter-layer insulating film, forming a Ta-based barrier film, forming a Cu plating film, conducting annealing and then conducting CMP, similar peeling takes place between the barrier film and the SiOF inter-layer insulating film owing to the load applied during CMP. No peeling occurred when no annealing was conducted before CMP.
When the inter-layer insulating film is composed of SiO
2
, annealing is known to improve adhesivity between barrier film and inter-layer insulating film; therefore, annealing has been conducted positively. It has not been known that when the inter-layer insulating film is composed of SiOF, annealing reduces its adhesivity with a Ta-based barrier film. This problem offers a novel task.
It is considered to, as described in the above literature, interpose a SiO
2
film between a barrier film and a SiOF film for adhesivity improvement. This approach is not practical because it invites an increased dielectric constant (the meaning of using a SiOF film is negated) and complicated steps.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor device having a copper interconnect filled in the inter-layer insulating film composed of SiOF, wherein the adhesion between the inter-layer insulating film and the barrier film is improved for higher reliability of interconnect and the whole inter-layer insulating film has a low dielectric constant for smaller capacity between interconnects and higher-speed operation of device; and a method for producing such a semiconductor device.
To achieve the above object, the present invention provides a semiconductor device having a copper interconnect filled in a trench of an inter-layer insulating film composed of at least SiOF, via a barrier film, wherein the barrier film is composed of tantalum nitride containing 30 to 60%, particularly 40 to 60% of nitrogen.
In the semiconductor device of the present invention, the barrier film preferably has a thickness of 5 to 60 nm, and the copper interconnect preferably has a resistivity of 2 &mgr;&OHgr;.cm or less at 20° C.
According to the present invention, there is also provided a method for producing a semiconductor device having a copper interconnect filled in a trench of an inter-layer insulating film composed of at least SiOF, via a barrier film, which process comprises:
a step of forming an inter-layer insulating film composed of SiOF,
a step of forming a trench in the inter-layer insulating film,
a step of forming, on the whole surface of the inter-layer insulating film including the trench surface, a barrier film composed of tantalum nitride containing nitrogen in an amount of 30 to 60%,
a step o

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