Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – Plural light emitting devices
Reexamination Certificate
2000-06-22
2002-08-13
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
Plural light emitting devices
C257S092000, C257S443000, C257S079000, C257S081000, C257S082000, C257S723000
Reexamination Certificate
active
06433367
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the general field of semiconductor technology, and in particular to wire bonding.
Wire bonding is a well-known technique for electrically connecting a semiconductor device to another device, or to the board, card, or other substrate on which the semiconductor device is mounted. Wire-bonding methods can be classified into nail-bonding methods and wedge-bonding methods. In both methods, a fine wire is connected at one end to a bonding pad formed on the semiconductor device, and at the other end to a bonding pad formed on the other device, or a wiring pattern formed on the substrate. The wire is attached to the bonding pad on the semiconductor device by a solid-phase diffusion bond. The solid-phase diffusion bond is created by placing the end of the fine wire in contact with the bonding pad, applying heat and/or ultrasonic waves, and placing a load (of, for example, 50-150 grams) on the fine wire and bonding pad with a tool referred to as a capillary or wedge. Wire bonding is a high-speed process, and is widely used in volume production.
Wire bonding must sometimes be performed on semiconductor devices with sloping sides or sloping ends. For example, the present inventors have found that it is advantageous for light-emitting diode (LED) array chips to have ends that slope inward from the upper surface, on which the LEDs and bonding pads are located, to the lower surface. The advantage is that when two such LED array chips are placed end-to-end, the chance of unwanted contact between their ends is reduced.
A problem is that when a bonding wire is attached to a bonding pad disposed above a sloping end of an LED array chip, the load applied during the wire-bonding process stresses the sloping surface, and may produce a harmful crack. Further explanation of this problem will be given in the detailed description of the invention.
It is anticipated that similar problems may occur in semiconductor laser array chips.
SUMMARY OF THE INVENTION
An object of the present invention is to enable wire bonding to be performed on semiconductor devices having sloping sides, without the formation of cracks.
According to a first aspect of the invention, a semiconductor device has two opposing surfaces, referred to below as a first surface and a second surface, and at least one sloping side that slopes inward from the first surface to the second surface. Because of the sloping side, only part of the first surface directly faces the second surface. The semiconductor device also has least one bonding pad formed on the first surface. Every bonding pad on the first surface is disposed within the part of the first surface that directly faces the second surface. Mechanical loads applied during wire bonding are therefore transmitted to the second surface and dissipated in the supporting substrate, whereby stress and cracks are prevented.
According to a second aspect of the invention, an electronic apparatus includes a plurality of semiconductor devices, each having a first surface, a second surface opposing the first surface, and a pair of sloping ends that slope inward from the first surface to the second surface. Wire bonding pads are formed on the first surfaces of the semiconductor devices. The second surfaces of the semiconductor devices are attached by resin to a supporting substrate, the semiconductor devices being placed end-to-end on the substrate. The resin also forms mounds in the spaces between adjacent semiconductor devices, these mounds supporting the sloping ends of the semiconductor devices. During wire bonding, applied mechanical loads which are transmitted to the sloping ends are then transmitted through the resin mounds to the supporting substrate, whereby stress and cracks are prevented.
REFERENCES:
patent: 5037780 (1991-08-01), Fujimoto et al.
patent: 5872700 (1999-02-01), Collander
patent: 5886404 (1999-03-01), You
patent: 5999413 (1999-12-01), Ohuchi et al.
Kayama et al.(ed.), “VLSI Packaging for Logic Devices,” vol. 2, Nikkei BP, 1993, pp. 17-30.
Ozawa Susumu
Tohyama Hiroshi
Yamada Satoru
Akin Gump Strauss Hauer & Feld L.L.P.
Oki Data Corporation
Talbott David L.
Thai Luan
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