Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
1999-08-06
2002-05-21
Abraham, Fetsum (Department: 2816)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S050000, C257S051000, C257S063000, C257S064000, C257S065000, C257S066000, C257S347000, C257S736000, C257S750000
Reexamination Certificate
active
06392253
ABSTRACT:
BACKGROUND OF THE INVENTION
In the current integrated circuits (ICs) business, whose total world market now is in excess of $100 billion, all of the ICs are manufactured using a 2-dimensional (2-D) technology. This means that all the IC chips on a single crystal (SC) silicon (Si) wafer use various types of devices, such as transistors and diodes, laid out on the Si surface in a 2-D manner. In such a manufacturing technology, epitaxial layers of Si grown on the SC Si wafer substrate are used commonly. These are SC Si layers having the same crystal orientation as that of bulk SC Si wafer. The crystal structure of the epitaxial layers, as well as that of the bulk Si wafer, is required to be near perfect for achieving excellent and reproducible device characteristics. This goal has been achieved, and that is why the entire microelectronic industry has continued to grow according to Moore's Law (Ref. 1), and is doing quite well indeed.
Moore's Law (Ref. 1; ibid) has guided the entire microelectronic industry very well so far. However, the entire microelectronic industry consists of, and Moore's Law applies to, monolithic Si ICs only, in which all the devices are laid out in a 2-dimensional manner in a SC of Si. Such ICs are known popularly as chips, and they can also be referred to as 2D-Si-ICs. Another key point to remember is that these ICs use primarily electrical signals to perform all the functions. For faster electrical functions, eg, in the microwave regime, and for performing optical functions, devices made on SC compound semiconductor wafers and films are needed. Moore's Law (Ref. 1; ibid) does not apply to compound semiconductor ICs, nor to the combination of monolithic Si-compound semiconductor ICs.
One of the key features of Moore's Law (Ref. 1; ibid) is that it predicts the rate of growth of the total number of devices per chip. This requires, and it also forecasts, the rate of decrease of minimum geometries of the devices and interconnects. Consequently these Si ICs, have grown continually in complexity. They have had an ever increasing device density, and they have been fabricated with ever decreasing sizes of the device and interconnect geometries. However, due to the fundamental limits of the materials and the associated technologies, this cannot go on forever. Dr. Moore (Ref. 1; ibid) has reviewed various other factors also, and has concluded that his law will cease to be valid before too long. While no definite limit has been established yet, it appears that the validity of Moore's Law will cease at dimensions smaller than about 0.1 &mgr;m.
The level of integration in Si ICs in terms of device density, however, can continue to be increased beyond the limit of Moore's Law (Ref. 1; ibid), ie, beyond the 2-D limit of 0.1 &mgr;m. This can be achieved even without scaling the device and interconnect geometries, by invoking device fabrication in the third dimension, viz, by manufacturing 3-dimensional (3-D) ICs. This would enhance the device density, and hence the functionality and performance of the Si ICs, both in the present regime where Moore's Law is valid, and also beyond its limit of validity for the 2D-Si-ICs. Thus, the mandatory necessity for continued device and interconnect scaling to achieve an ever increasing number of devices per chip with time according to Moore's Law (Ref. 1; ibid), and to keep on pushing the manufacturing technologies to the limit, is obviated by the 3D-Si-ICs. However, to manufacture the truly 3-dimensional ICs, viz, 3D-Si-ICs, SC films of Si need to be grown on the amorphous (AM) silicon-di-oxide (SiO
2
) layers or films (these two words, viz, layers or films, are being used interchangeably in this patent write-up, and also in the literature). No production worthy technology is available yet to do this. The SiO
2
films, as it is well-known, are an inherent part of the structure of the 2D-Si-ICs.
The requirement to grow good SC films of Si on AM SiO
2
films, is similar to that of the bulk SC Si wafers. Their crystal perfection has to be free of any defects, so that the performance characteristics of the devices are excellent and reproducible all the time. Recrystallization of AM and polycrystalline Si (poly-Si) films deposited on AM SiO
2
films, has been attempted in the past, but it has not produced good SC films of Si. This technique has given Si films, having small regions with different crystal orientations, and resulting in many grain boundaries. This type of film will produce devices with poor and varying electrical characteristics within a chip, chip-to-chip, and wafer-to-wafer. No wonder that such a film has not yet been successful in producing the 3D-Si-ICs. This is evident from the fact that no such products are available so far in the microelectronic industry. So, the critical need to produce 3D-Si-ICs is to be able to fabricate devices on good SC films of Si grown reproducibly on AM SiO
2
, or other suitable insulator, eg, Si
3
N
4
, films used currently in the manufacturing of the 2D-Si-ICs.
One of the techniques attempted so far to grow SC films of Si on AM SiO
2
films, has been to use epitaxial lateral overgrowth (ELO) technology. In this technology, seeding from the SC Si substrate is used to grow the epitaxial SC Si layers over SiO
2
films (Ref. 2). However, this technology, though tried for over a decade, has not yet been successful either to grow good SC films of Si on SiO
2
films reproducibly. Another drawback of the ELO technology is that it requires area on the chip for seeding purposes. This negates the advantage of 3D-Si-ICs over 2D-Si-ICs for increasing the device density, by taking away the valuable area for seeding which could have been used for devices. Other approaches to accomplish this, are wafer bonding and SIMOX (separation by implantation of oxygen). For a recent review, see Ref. 3. While these technologies have made good progress for SOI (silicon-on-insulator), they have not yet been found suitable for fabricating 3D-Si-ICs.
The invention described here relates to the fabrication of semiconductor devices in single crystal films grown on arrayed nucleation sites on amorphous and/or non-crystal surfaces. Henceforth, such new devices shall be referred to as SCANS devices. As an example, this invention will allow fabrication of SCANS devices in SC Si films grown selectively on AM SiO
2
films of a processed ULSIC wafer. These SC Si films can have any desired orientation of crystal planes, eg, (100), (111), etc. Further, this invention allows fabrication of different types of SCANS devices in SC Si films having different crystallographic planes/structures, grown simultaneously by in-situ selective growth in their respective regions of AM substrates.
Devices for performing optical functions, and for faster electrical functions, eg, in the microwave regime, are better performed with devices fabricated in SC compound semiconductors (eg, GaAs, GaAlAs, GaP, etc) than those fabricated in SC Si. Therefore, it is also of interest to grow SC compound semiconductor films on SiO
2
surfaces of ULSICs. The SCANS devices fabricated in such compound semiconductor films, can be used for performing optical functions, and for faster electrical functions, eg, in the microwave regime. The invention described here enables this technology also. Combining the best of both the worlds of Si and compound semiconductor ICs leads to ultra performance ICs (UPICs) (Ref. 4). Thus, the maximum functionality, reliability and low power of Si ICs can be integrated monolithically with the unique performance (eg, optical and microwave) capabilities of the compound semiconductor ICs to produce UPICs. The UPICs are the ultimate in ICs known to mankind (Ref. 4; ibid).
No production worthy technologies to grow SC films of Si and compound semiconductors on AM surfaces are available so far. However, the invention described here enables these technologies for the fabrication of 3D-Si-ICs and UPICs. The invention described here can also be used to enhance the performance and the yield of the curre
Abraham Fetsum
Fliesler Dubb Meyer & Lovejoy LLP
Gimlan Gideon
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