Semiconductor device with Schottky layer

Details Semiconductor device with Schottky layer Semiconductor device with Schottky layer

1999-04-22

2001-09-25

Mintel, William (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S194000, C257S195000, C438S172000

Reexamination Certificate

active

06294801

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device and a process of fabricating the same, and more particularly, to a structure of a semiconductor device such as a field-effect transistor, and the like, having a Schottky electrode, and a process of fabricating the structure.
2. Description of the Related Art
A field-effect transistor (referred to hereinafter as FET) using a compound semiconductor has been well known, and among FETs, attention has since been drawn to a double-hetero (DH) junction type high electron mobility field-effect transistor (referred to hereinafter as HEMT) as a device capable of gaining high output and high efficiency characteristic. Such a HEMT has been described in, for example, a paper under the title of “High Power Pseudomorphic Double-heterojunction Field Effect Transistors With 26V Gate-drain Breakdown Voltages”, by K. Matsunaga, N. Iwata, and M. Kuzuhara, Inst. Phys. Conf. Ser. No. 129, Chapter 9, pp. 749-754 (1992).
Further, among HEMTs, there has been well known a HEMT fabricated by combining a substrate composed of gallium arsenide (GaAs) with a channel layer composed of indium gallium arsenide (InGaAs). The HEMT of such a structure is called a pseudomorphic HEMT (referred to hereinafter as PHEMT) because it has a structure incorporating the channel layer composed of indium galliim arsenide (InGaAs) having a crystal lattice warped due to the lattice constant thereof being different from that of gallium arsenide (GaAs) used for the substrate. In the PHEMT, n-type aluminum gallium arsenide (AlGaAs) is used for an electron supply layer for supplying electrons into a potential well in the channel layer, and AlGaAs without any dopant (&PHgr;) implanted is used for a Schottky layer to raise a height of the Schottky barrier of a gate electrode.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a high reliable, novel, and improved semiconductor device as well as a process of fabricating the same by covering the surface of a chemically active Schottky layer with a chemically stable cap layer, and by embedding a gate electrode in a region where coveting of the Schottky layer with the cap layer tends to become imperfect, so that aluminum atoms existing in the surface of &PHgr;
−
AlGaAs composing the Schottky layer are prevented from bonding with elements in air, and materials and impurities, adhered thereto, during a fabrication process, and from resultantly forming a deep level having electrical effect in a forbidden band, thereby lessening a risk of surface defect, and resulting in a high reliability and high yield.
Another object of the invention is to provide a novel, and improved semiconductor device such as a PHEMT, having a high cut-off frequency fT, and a process of fabricating same by forming a Schottky electrode so as to render a bottom surface area thereof, facing two-dimensional electron gas in a channel layer, smaller, so that high mutual conductance gm, and low capacitance Cgs between a gate and a source can be obtained.
Still another object of the invention is to provide a novel, and improved semiconductor device such as a PHEMT, having a high cut-off frequency fT, and a process of fabricating same by obtaining high mutual conductance gm, and low capacitance Cgs between a gate and a source without deteriorating the characteristic of high breakdown voltage between the gate and the drain.
It is a further object of the invention to provide a novel and improved semiconductor device, and a process of fabricating same, wherein the characteristics of the semiconductor device can be optimized after fabricating a gate electrode, a source electrode, and a drain electrode into a wafer, thereby enhancing flexibility in designing a process of fabrication.
The semiconductor device according to the invention comprises a Schottky electrode having an under structure penetrating through the Schottky layer and the cap layer covering the Schottky layer and reaching the Schottky, layer, and having an upper structure larger than the under structure, in a cross-sectional area, and overlying the cap layer.
Further, various other aspects of the invention for attaining the objects described above are disclosed hereinafter, and will be apparent from the following detailed description of the preferred embodiments of the invention in conjunction with the accompanying drawings.


REFERENCES:
patent: 4424525 (1984-01-01), Mimura
patent: 5043777 (1991-08-01), Sriram
patent: 5250822 (1993-10-01), Sonoda et al.
patent: 5391899 (1995-02-01), Kohno
patent: 6078067 (2000-06-01), Oikawa
Breech et al., “Optimization of Pseudomorphic HEMT's Supported by Numerical Simulations,” IEEE Transactions on Electron Devices, vol. 44, No. 11, Nov. 1997, pp. 1822-1828.*
Lee et al., “Ultra Low Noise Characteristics of AlGaAs/InGaAs/GaAs Pseudomorphic HEMT's with Wide T-Shaped Gate”, IEEE Electron Device Letters, vol. 16, No. 6, Jun. 1995, pp. 271-273.*
Kohji Matsunaga et al., “High power pseudomorphic double-heterojunction field effect transistors with 26V gate-drain breakdown voltages,” Inst. Phys. Conf. Chapter 9, pp. 749-754.

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