Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2001-06-28
2002-12-10
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S281000, C257S471000
Reexamination Certificate
active
06492669
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor device that is provided with a Schottky electrode, and more particularly to a field-effect transistor having high breakdown resistance for application in high-frequency and high-temperature operation.
2. Description of the Related Art
As disclosed by, for example, Lei Wang et al. (Applied Physics Letters Vol.68 (No.9) pp.1267 (1996)), it is known that GaN semiconductors have a higher Schottky barrier than other Group III-V compound semiconductors.
According to the publication mentioned above, Wang et al. fabricated Pt/GaN and Pd/GaN Schottky diodes and measured the Schottky barrier heights of each. The Schottky barrier height of a Pt/GaN Schottky diode was 1.13-1.27 eV, and the Schottky barrier height of a Pd/GaN Schottky diode was 0.96-1.24 eV. These values are higher than the GaAs Schottky barrier height (0.7 eV or lower) or the InP Schottky barrier height (0.5 eV or lower).
In a heterojunction field-effect transistor (HJFET), an AlGaN layer is normally used as the semiconductor layer (electron barrier layer) that contacts a Schottky electrode. This is disclosed by, for example, Egawa et al. (Applied Physics Letters Vol.76 (No.1) pp.121 (2000)).
FIG. 1
is a sectional view of a field-effect transistor disclosed by Egawa, et al. As shown in
FIG. 1
, GaN seed formation layer
1002
having a film thickness of 30 nm, GaN layer
1003
having a film thickness of 2.5 &mgr;m, AlGaN spacer layer
1004
having a film thickness of 10 nm, n-type AlGaN carrier supply layer
1005
having a film thickness of 20 nm, and n-type GaN cap layer
1006
having a film thickness of 20 nm are formed by metalorganic vapor phase epitaxy method on sapphire substrate
1001
. A portion of GaN cap layer
1006
and AlGaN carrier supply layer
1005
is then removed by a reactive ion etching (RIE) method. Source electrode
1007
and drain electrode
1008
are then formed from Ti/Al, and gate electrode
1009
is formed from Pt/Ti/Au, thereby completing the field-effect transistor. Because the AlGaN layer has a larger band gap than a GaN layer, the Schottky barrier height at the interface of the Pt and AlGaN is higher than the Schottky barrier height at the interface of the Pt and GaN.
Nevertheless, Schottky barrier height is insufficient in the configuration of the prior-art during operation in which a Schottky voltage is applied in the positive direction. In particular, in the case of a field-effect transistor in which current across the source and drain is 0 when gate voltage is not applied, i.e., a field-effect transistor that operates in enhancement mode, there is the problem that the leakage current increases and the amplification factor deteriorates during operation, i.e., when a Schottky voltage is applied in the positive direction.
As a countermeasure, a method can be considered in which the thickness of the AlGaN layer is increased to raise the Schottky barrier thickness and decrease the leakage current. However, limitations exist in relation to the critical layer thickness, and increasing the thickness of the AlGaN layer sufficiently to obtain adequate Schottky barrier thickness is problematic. Increasing the Al composition in the AlGaN layer to raise the Schottky barrier height can also be considered. However, increasing the Al composition component brings about an increase in tensile strain within the layer and a decrease in the critical layer thickness, and obtaining sufficient Schottky barrier height is again problematic.
SUMMARY OF THE INVENTION
In view of the above-described problems, it is an object of the present invention to realize a Schottky barrier having sufficient height, which could not be obtained in the prior art, and thus effectively suppress leakage current.
To solve the above-described problems, the present invention prevents leakage current by forming an energy band structure having a Schottky barrier of two-step construction and having sufficient height by providing a layer having a compressive strain below a Schottky electrode, as shown, for example, in
FIGS. 2A and 2B
.
In a case in which III-V semiconductor layers having different lattice constants are formed, internal strain occurs in the semiconductor layers, and it is known that the piezoelectric effect that is brought about by this internal strain generates an internal field in the layers. For example, in a case in which, on the (0001) plane of a thick base layer that is composed of a III-nitride semiconductor, a material is formed that has a larger lattice constant than the thick base layer, compressive strain will remain in the layer if the film thickness of the formed material falls below the critical layer thickness at which dislocation generates due to lattice mismatch. The piezoelectric effect brought about by this compressive strain generates an internal field in the direction from the interior of the layer toward the surface. If the formed material has a smaller lattice constant than the thick base layer, on the other hand, tensile strain will remain in the layer and an internal field will be generated in the opposite direction. The present invention takes advantage of this piezoelectric effect to increase the Schottky barrier height. In this specification, the (0001) plane in the III-nitride semiconductor crystal refers to the plane that is shaded with diagonal lines in FIG.
3
.
A semiconductor device of this invention comprises: a first electron barrier layer, a second electron barrier layer that is formed on this first electron barrier layer either directly or on an interposed spacer layer, and a Schottky electrode that is formed on this second electron barrier layer. A negative piezoelectric charge is induced on the first electron barrier layer side of the second electron barrier layer, and positive piezoelectric charge is induced on the Schottky electrode side of the second electron barrier layer.
According to this semiconductor device, the effect of the piezoelectric charge that is induced in the second electron barrier layer can effectively increase the Schottky barrier height of the first electron barrier layer, thereby enabling an effective suppression of leakage current.
In this semiconductor device, moreover, adopting a construction in which a negative piezoelectric charge is induced on the second electron barrier layer side of the first electron barrier layer and a positive piezoelectric charge is induced on the opposite side of the first electron barrier layer further increases the Schottky barrier height that is brought about by the piezoelectric charges that are induced in the second electron barrier layer.
If the first and second electron barrier layers are both formed from III-nitride semiconductor materials, good piezoelectric polarization can be produced and the Schottky barrier height is further increased by the piezoelectric charges that are induced in the second electron barrier layer.
Another example of the semiconductor device of this present invention comprises: a base layer, a first electron barrier layer that is formed directly on the base layer, a second electron barrier layer that is formed either directly on this first electron barrier layer or on an interposed spacer layer, and a Schottky electrode that is formed on this second electron barrier layer. The base layer, the first electron barrier layer, and the second electron barrier layer are all wurtzite III-nitride semiconductors that take the (0001) plane as the principal plane. In addition, the second electron barrier layer has compressive strain.
In this semiconductor device, the second electron barrier layer has compressive strain, and a piezoelectric charge can therefore be induced in the second electron barrier layer and the Schottky barrier height in the first electron barrier layer can be effectively raised, thereby effectively suppressing leakage current.
In this semiconductor device, moreover, if a structure is adopted in which the first electron barrier layer has tensile strain, the piezoelectric charge that is induce
Ando Yuji
Hayama Nobuyuki
Kasahara Kensuke
Kunihiro Kazuaki
Kuzuhara Masaaki
McGinn & Gibb PLLC
NEC Corporation
Tran Long K.
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