Semiconductor device with reduced thickness

Details Semiconductor device with reduced thickness Semiconductor device with reduced thickness

1999-04-27

2000-12-26

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

257778, 257686, 257781, 257782, 257786, 438109, 438108, H01L 2348, H01L 2352, H01L 2940, H01L 2302

Patent

active

06166443&

ABSTRACT:
Internal electrodes and external lead wiring lines are formed on the front surface of a substrate of a semiconductor device, and solder bumps electrically connected to the external lead wiring lines via through holes are provided on the rear surface of the substrate. A first semiconductor chip is mounted on the surface of the substrate, and a second semiconductor chip is mounted on the rear surface of the substrate. Electrodes of the first semiconductor chip are connected to bonding pads at one side ends of the internal wiring lines, and electrodes of the second semiconductor chip are connected to the bonding pads at the other ends of the internal wiring lines and the external lead wiring lines with bonding wires passing through openings provided in the substrate. The solder bumps are formed with a height equal to or greater than the thickness of the second semiconductor chip so that, when the semiconductor device is mounted on an external mounting board or the like, a gap is formed between the substrate of the semiconductor device and the external mounting board by the height of the solder bumps themselves. The second semiconductor chip mounted on the rear surface of the substrate is accommodated in the gap.

REFERENCES:
patent: 5715144 (1998-02-01), Ameen et al.
patent: 5854507 (1998-12-01), Miremadi et al.
patent: 6025648 (2000-02-01), Takahashi et al.
patent: 6093969 (2000-07-01), Lin

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