Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2005-10-24
2008-10-14
Chu, Chris C. (Department: 2815)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S106000, C438S112000, C438S126000, C438S508000, C257SE23126, C257S787000, C257S789000, C257S790000, C174S050510, C174S050510
Reexamination Certificate
active
07435625
ABSTRACT:
Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ε and/or lower loss tangent δ than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ε buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower δ buffer region reduces the parasitic loss in the encapsulation. Low ε and/or δ buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ε less than about 3.0 and/or δ less than about 0.005.
REFERENCES:
patent: 4041009 (1977-08-01), Takeda et al.
patent: 4079162 (1978-03-01), Metzger
patent: 4788583 (1988-11-01), Kawahara et al.
patent: 5057457 (1991-10-01), Miyahara et al.
patent: 5097317 (1992-03-01), Fujimoto et al.
patent: 5379186 (1995-01-01), Gold et al.
patent: 5382829 (1995-01-01), Inoue
patent: 5446315 (1995-08-01), Hazaki et al.
patent: 5458709 (1995-10-01), Kamezaki et al.
patent: 5578860 (1996-11-01), Costa et al.
patent: 5593526 (1997-01-01), Yokouchi et al.
patent: 5598034 (1997-01-01), Wakefield
patent: 5785789 (1998-07-01), Gagnon et al.
patent: 5793118 (1998-08-01), Nakajima
patent: 5869355 (1999-02-01), Fukaya
patent: 5889232 (1999-03-01), Ichikawa et al.
patent: 6001673 (1999-12-01), Marcinkiewicz
patent: 6191492 (2001-02-01), Yamazaki et al.
patent: 6440772 (2002-08-01), Smith
patent: 6455606 (2002-09-01), Kaku et al.
patent: 6521703 (2003-02-01), Zarnoch et al.
patent: 6630153 (2003-10-01), Long et al.
patent: 6713590 (2004-03-01), Lau et al.
patent: 6744117 (2004-06-01), Dragon et al.
patent: 6794481 (2004-09-01), Amagai et al.
patent: 6849696 (2005-02-01), Lau et al.
patent: 6890641 (2005-05-01), Mukherjee et al.
patent: 2002/0033108 (2002-03-01), Akiyama et al.
patent: 2003/0130438 (2003-07-01), Amagai et al.
patent: 09027573 (1997-01-01), None
Prassas, Michael, Silica Glass from Aerogels, Sol-Gel Gateway: Glass from Aerogels, http://www.solgel.com/articles/april01/aerog2.htm and http://www.solgel.com/articles/april01.aerog.htm.
Simmonds, M. et al., SiLK Semiconductor Dielectric Resin Films, technical paper, Dow Chemical Company, pp. 1-7.
Dow Unveils Advanced SiLK Resin Featuring Drastically Smaller Pore Size, Introduces First Porous ILD to Enable Continuous Tantalum Barriers, Dow Chemical Company, Dec. 25, 2003, http://www.dow.com/silk
ews/20030918b.htm.
Perry, J. et al., SiLK Semiconductor Dielectric Resins, technical paper, Dow Chemical Company, pp. 1-6.
SiLK Works, Dow Chemical Company, http://www.dow.com/silk/index.htm.
Physical Sciences—Sol Gel Introduction, http://www.bell-labs.com/org/physicalsciences/projects/solgel/solgel.html.
Sol-Gel Technologies, Sol-Gel Improves the quality of Human Life, http://www.sol-gel.com/technology.html.
Phalippou, Jean, Sol-Gel: A Low Temperature Process for the Materials of the New Millenium, Sol-Gel Tutorial, http://www.solgel.com/articles/June00/phalip/introsolgel.htm.
Peters, Laura, Is Pore Sealing Key to Ultralow-k Adoption?, Semiconductor International, Oct. 1, 2005, http://www.reed-electronics.com/semiconductor/article/CA6260716?industryid=3032&nid=2012.
International Search Report and Written Opinion.
Condie Brian W.
Mahalingam Mali
Shah Mahesh K.
Chu Chris C.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
LandOfFree
Semiconductor device with reduced package cross-talk and loss does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with reduced package cross-talk and loss, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with reduced package cross-talk and loss will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3995244