Semiconductor device with reduced package cross-talk and loss

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C438S106000, C438S112000, C438S126000, C438S508000, C257SE23126, C257S787000, C257S789000, C257S790000, C174S050510, C174S050510

Reexamination Certificate

active

07435625

ABSTRACT:
Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ε and/or lower loss tangent δ than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ε buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower δ buffer region reduces the parasitic loss in the encapsulation. Low ε and/or δ buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ε less than about 3.0 and/or δ less than about 0.005.

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