Semiconductor device with reduced leakage of current

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

06603345

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having active elements of MOS field effect transistors suitable for suppressing a band-to-band leak current and a sub-threshold current.
2. Description of the Related Art
Shrinkage of the semiconductor device needs to reduce the power voltage level. The reduction in thickness of the gate oxide film of the field effect transistor causes the increase in the intensity of electric field applied to the gate oxide film, resulting in a deterioration in quality of the gate oxide film. Shortening the gate length makes it difficult to ensure the withstand voltage between the source and drain. The shrinkage of the semiconductor device caused increased field intensities at various positions of the semiconductor device. In order to avoid the increase of the field intensities, it is necessary to reduce the power voltage in accordance with the scaling rule.
The reduction in thickness of the gate oxide film due to the shrinkage of the semiconductor device is likely to cause the band-to-band tunneling as the band-to-band leak current in the drain region of the MOS field effect transistor. This leak current is small as absolute value. The leak current is influence in the static mode of the semiconductor device such as the stand-by mode rather than the operational mode.
The band-to-band tunneling phenomenon is due to the fact that the bending of the energy band on the substrate surface in the vicinity of the drain region is larger than the band gap of silicon. The reduction of the power voltage is effective to suppress the band-to-band tunneling phenomenon. This reduction of the power voltage, however, makes it difficult to improve the desirable high speed performance of the semiconductor device.
An alternative counter-measure to suppress the band-to-band tunneling phenomenon has been proposed, which suppresses the impurity concentration of the drain region in the substrate surface for relaxing the field intensity in the drain region. This alternative counter-measure causes a disadvantage in that the resistance of the drain region is increased, whereby the current driving ability of the MOS field effect transistor is dropped, resulting in the difficulty in improvement of the high speed performance of the semiconductor device.
The reduction in the power voltage due to the scaling down of the semiconductor device also causes the drop in the voltage level of the control signal applied to the gate electrode of the MOS field effect transistor. The drop in the voltage level of the control signal applied to the gate electrode causes the drop of the drain current, whereby the high speed performance is deteriorated.
A counter-measure to avoid the drop of the operation speed of the semiconductor device has been proposed, wherein a gate threshold voltage is dropped to improve the current driving ability of the MOS field effect transistor. The drop of the gate threshold voltage increases the sub-threshold current, whereby the leak current is thus increased. This increased leak current is influential in the static mode such as the stand-by mode of the semiconductor device.
Further, the reduction in thickness of the gate oxide film due to the shrinkage of the semiconductor device increases the field intensity applied to the gate oxide film, which results in a possibility of causing the tunneling current. The tunneling current causes a leakage of current between the gate electrode and the source region or the drain region. This increased leak current is also influential in the static mode such as the stand-by mode of the semiconductor device.
In the above circumstances, the development of a novel semiconductor device free from the above problems is desirable.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel semiconductor device free from the above problems.
It is a further object of the present invention to provide a novel semiconductor device which exhibits an improved high speed performance under condition of a reduced power voltage level due to the shrinkage of the semiconductor device.
It is a still further object of the present invention to provide a novel semiconductor device which exhibits an improved high speed performance with reduced leakage of current
The present invention provides a semiconductor device comprising: at least a circuit block including field effect transistors; and a potential supplying circuit supplying one of a predetermined power potential and a predetermined ground potential to the at least circuit block in an active mode, and the potential supplying circuit further shifting the one of the predetermined power potential and the predetermined ground potential to reduce a potential difference between the predetermined power potential and the predetermined ground potential for supplying the shifted potential to the at least circuit block in a static mode.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.


REFERENCES:
patent: 4859870 (1989-08-01), Wong et al.
patent: 5274601 (1993-12-01), Kawahara et al.
patent: 5583457 (1996-12-01), Horiguchi et al.
patent: 5614847 (1997-03-01), Kawahara et al.
patent: 5880623 (1999-03-01), Levinson
patent: 6049245 (2000-04-01), Son et al.
patent: 6307396 (2001-10-01), Mulatti et al.

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