Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2008-03-05
2011-10-18
Loke, Steven (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C327S530000
Reexamination Certificate
active
08039965
ABSTRACT:
A semiconductor device with a reduced layout area includes pads disposed between a first voltage line and a second voltage line; first and second driver units adjacently disposed at an upper portion or a lower portion of the respective pads; and a metal line disposed between the pads and supplying power commonly to the first and second driver units.
REFERENCES:
patent: 6249410 (2001-06-01), Ker et al.
patent: 7411767 (2008-08-01), Huang et al.
patent: 2003/0235019 (2003-12-01), Ker et al.
patent: 2001-358223 (2001-12-01), None
patent: 1020010048211 (2001-06-01), None
patent: 1020050022879 (2005-03-01), None
patent: 1020070077519 (2007-07-01), None
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Loke Steven
Ziskind David
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