Semiconductor device with reduced aspect ratio contact hole

Details Semiconductor device with reduced aspect ratio contact hole Semiconductor device with reduced aspect ratio contact hole

1996-08-30

1998-12-08

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257638, 257641, 257644, 257650, H01L 2358

Patent

active

058474447

ABSTRACT:
A semiconductor device has a memory cell area which contains a component having a height and a peripheral circuit area free of a component having a height. The first area includes a interlayer insulating film comprising a first interlayer film as an uppermost insulating film. The second area includes an interlayer insulating film comprising the first interlayer film and a second interlayer film disposed directly on the first interlayer film and having a chemical mechanical polishing rate greater than the first interlayer film. The interlayer insulating film in the memory cell area has a surface higher than the interlayer insulating film in the peripheral circuit area.

REFERENCES:
patent: 4795722 (1989-01-01), Welch et al.
patent: 5186745 (1993-02-01), Maniar
patent: 5314843 (1994-05-01), Yu et al.
patent: 5378318 (1995-01-01), Weling et al.
patent: 5457073 (1995-10-01), Ouellet
patent: 5606193 (1997-02-01), Ueda et al.

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